39 #include <hls_stream.h>
51 stream<NalConfigUpdate> &sToPortLogic,
52 stream<NalConfigUpdate> &sToUdpRx,
53 stream<NalConfigUpdate> &sToTcpRx,
54 stream<NalConfigUpdate> &sToStatusProc,
55 stream<NalMrtUpdate> &sMrtUpdate,
57 stream<uint32_t> &mrt_version_update_0,
58 stream<uint32_t> &mrt_version_update_1,
59 stream<NalStatusUpdate> &sStatusUpdate
65 stream<NalMrtUpdate> &sMrtUpdate,
66 stream<NodeId> &sGetIpReq_UdpTx,
67 stream<Ip4Addr> &sGetIpRep_UdpTx,
68 stream<NodeId> &sGetIpReq_TcpTx,
69 stream<Ip4Addr> &sGetIpRep_TcpTx,
70 stream<Ip4Addr> &sGetNidReq_UdpRx,
71 stream<NodeId> &sGetNidRep_UdpRx,
72 stream<Ip4Addr> &sGetNidReq_TcpRx,
73 stream<NodeId> &sGetNidRep_TcpRx
83 ap_uint<1> *piNTS_ready,
84 ap_uint<16> *piMMIO_FmcLsnPort,
85 ap_uint<32> *pi_udp_rx_ports,
86 ap_uint<32> *pi_tcp_rx_ports,
87 stream<NalConfigUpdate> &sConfigUpdate,
88 stream<UdpPort> &sUdpPortsToOpen,
89 stream<UdpPort> &sUdpPortsToClose,
90 stream<TcpPort> &sTcpPortsToOpen,
91 stream<bool> &sUdpPortsOpenFeedback,
92 stream<bool> &sTcpPortsOpenFeedback,
93 stream<bool> &sMarkToDel_unpriv,
94 stream<NalPortUpdate> &sPortUpdate,
95 stream<bool> &sStartTclCls
102 ap_uint<1> *piNTS_ready,
103 stream<uint32_t> &mrt_version_update,
104 stream<bool> &inval_del_sig,
105 stream<bool> &cache_inval_0,
106 stream<bool> &cache_inval_1,
107 stream<bool> &cache_inval_2,
108 stream<bool> &cache_inval_3
112 stream<SessionId> &sGetTripleFromSid_Req,
113 stream<NalTriple> &sGetTripleFromSid_Rep,
114 stream<NalTriple> &sGetSidFromTriple_Req,
115 stream<SessionId> &sGetSidFromTriple_Rep,
116 stream<NalNewTableEntry> &sAddNewTriple_TcpRrh,
117 stream<NalNewTableEntry> &sAddNewTriple_TcpCon,
118 stream<SessionId> &sDeleteEntryBySid,
119 stream<bool> &inval_del_sig,
120 stream<SessionId> &sMarkAsPriv,
121 stream<bool> &sMarkToDel_unpriv,
122 stream<bool> &sGetNextDelRow_Req,
123 stream<SessionId> &sGetNextDelRow_Rep
ap_uint< 1 > layer_7_enabled
ap_uint< 1 > layer_4_enabled
#define NUMBER_CONFIG_WORDS
void axi4liteProcessing(ap_uint< 32 > ctrlLink[64+16+16], stream< NalConfigUpdate > &sToPortLogic, stream< NalConfigUpdate > &sToUdpRx, stream< NalConfigUpdate > &sToTcpRx, stream< NalConfigUpdate > &sToStatusProc, stream< NalMrtUpdate > &sMrtUpdate, stream< uint32_t > &mrt_version_update_0, stream< uint32_t > &mrt_version_update_1, stream< NalStatusUpdate > &sStatusUpdate)
Contains the Axi4 Lite secondary endpoint and reads the MRT and configuration values from it as well ...
#define NUMBER_STATUS_WORDS
void pCacheInvalDetection(ap_uint< 1 > *layer_4_enabled, ap_uint< 1 > *layer_7_enabled, ap_uint< 1 > *role_decoupled, ap_uint< 1 > *piNTS_ready, stream< uint32_t > &mrt_version_update, stream< bool > &inval_del_sig, stream< bool > &cache_inval_0, stream< bool > &cache_inval_1, stream< bool > &cache_inval_2, stream< bool > &cache_inval_3)
Detects if the caches of the USS and TSS have to be invalidated and signals this to the concerned pro...
void pTcpAgency(stream< SessionId > &sGetTripleFromSid_Req, stream< NalTriple > &sGetTripleFromSid_Rep, stream< NalTriple > &sGetSidFromTriple_Req, stream< SessionId > &sGetSidFromTriple_Rep, stream< NalNewTableEntry > &sAddNewTriple_TcpRrh, stream< NalNewTableEntry > &sAddNewTriple_TcpCon, stream< SessionId > &sDeleteEntryBySid, stream< bool > &inval_del_sig, stream< SessionId > &sMarkAsPriv, stream< bool > &sMarkToDel_unpriv, stream< bool > &sGetNextDelRow_Req, stream< SessionId > &sGetNextDelRow_Rep)
Contains the SessionId-Triple CAM for TCP sessions. It replies to stram requests.
ap_uint< 1 > role_decoupled
ap_uint< 32 > ctrlLink[64+16+16]
void pMrtAgency(stream< NalMrtUpdate > &sMrtUpdate, stream< NodeId > &sGetIpReq_UdpTx, stream< Ip4Addr > &sGetIpRep_UdpTx, stream< NodeId > &sGetIpReq_TcpTx, stream< Ip4Addr > &sGetIpRep_TcpTx, stream< Ip4Addr > &sGetNidReq_UdpRx, stream< NodeId > &sGetNidRep_UdpRx, stream< Ip4Addr > &sGetNidReq_TcpRx, stream< NodeId > &sGetNidRep_TcpRx)
Can access the BRAM that contains the MRT and replies to lookup requests.
void pPortLogic(ap_uint< 1 > *layer_4_enabled, ap_uint< 1 > *layer_7_enabled, ap_uint< 1 > *role_decoupled, ap_uint< 1 > *piNTS_ready, ap_uint< 16 > *piMMIO_FmcLsnPort, ap_uint< 32 > *pi_udp_rx_ports, ap_uint< 32 > *pi_tcp_rx_ports, stream< NalConfigUpdate > &sConfigUpdate, stream< UdpPort > &sUdpPortsToOpen, stream< UdpPort > &sUdpPortsToClose, stream< TcpPort > &sTcpPortsToOpen, stream< bool > &sUdpPortsOpenFeedback, stream< bool > &sTcpPortsOpenFeedback, stream< bool > &sMarkToDel_unpriv, stream< NalPortUpdate > &sPortUpdate, stream< bool > &sStartTclCls)
Translates the one-hot encoded open-port vectors from the Role (i.e. piUdpRxPorts and piTcpRxPorts) t...
: The cloudFPGA Network Abstraction Layer (NAL) between NTS and ROlE. The NAL core manages the NTS St...