cloudFPGA (cF) API
1.0
The documentation of the source code of cloudFPGA (cF)
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: IP Receiver packet handler (IPRX). More...
#include "iprx.hpp"
Go to the source code of this file.
Macros | |
#define | THIS_NAME "IPRX" |
#define | TRACE_OFF 0x0000 |
#define | TRACE_IBUF 1 << 1 |
#define | TRACE_MPD 1 << 2 |
#define | TRACE_ILC 1 << 3 |
#define | TRACE_ICA 1 << 4 |
#define | TRACE_ICC 1 << 5 |
#define | TRACE_IID 1 << 6 |
#define | TRACE_ICL 1 << 7 |
#define | TRACE_IPR 1 << 8 |
#define | TRACE_ALL 0xFFFF |
#define | DEBUG_LEVEL (TRACE_OFF) |
Functions | |
void | pInputBuffer (stream< AxisEth > &siETH_Data, stream< AxisEth > &soMPd_Data) |
void | pMacProtocolDetector (EthAddr piMMIO_MacAddr, stream< AxisEth > &siIBuf_Data, stream< AxisArp > &soARP_Data, stream< AxisEth > &soILc_Data) |
void | pIpLengthChecker (stream< AxisEth > &siMPd_Data, stream< AxisEth > &soICa_Data) |
void | pIpChecksumAccumulator (Ip4Addr piMMIO_Ip4Address, stream< AxisEth > &siILc_Data, stream< AxisIp4 > &soIId_Data, stream< Ip4Version > &soIId_IpVer, stream< CmdBit > &soIId_DropCmd, stream< SubSums > &soICc_SubSums) |
void | pIpInvalidDropper (stream< AxisIp4 > &siICa_Data, stream< Ip4Version > &siICa_IpVer, stream< ValBit > &siICa_DropFrag, stream< ValBit > &siICc_CsumValid, stream< AxisIp4 > &soICl_Data) |
void | pIpCutLength (stream< AxisIp4 > &siIId_Data, stream< AxisIp4 > &soIPr_Data) |
void | pIpChecksumChecker (stream< SubSums > &siICa_SubSums, stream< ValBit > &soIId_CsumValid) |
void | pIpPacketRouter (stream< AxisIp4 > &siICl_Data, stream< AxisIp4 > &soICMP_Data, stream< AxisIp4 > &soICMP_Derr, stream< AxisIp4 > &soUOE_Data, stream< AxisIp4 > &soTOE_Data) |
void | iprx (EthAddr piMMIO_MacAddress, Ip4Addr piMMIO_Ip4Address, stream< AxisEth > &siETH_Data, stream< AxisArp > &soARP_Data, stream< AxisIp4 > &soICMP_Data, stream< AxisIp4 > &soICMP_Derr, stream< AxisIp4 > &soUOE_Data, stream< AxisIp4 > &soTOE_Data) |
Main process of the IP Receive handler (IPRX). More... | |
void | iprx_top (EthAddr piMMIO_MacAddress, Ip4Addr piMMIO_Ip4Address, stream< AxisRaw > &siETH_Data, stream< AxisRaw > &soARP_Data, stream< AxisRaw > &soICMP_Data, stream< AxisRaw > &soICMP_Derr, stream< AxisRaw > &soUOE_Data, stream< AxisRaw > &soTOE_Data) |
Top of IP Receive handler (IPRX) More... | |
Variables | |
bool | gTraceEvent |
: IP Receiver packet handler (IPRX).
Copyright 2016 – 2021 IBM Corporation
Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. Copyright (c) 2015, Xilinx, Inc.
All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
System: : cloudFPGA Component : Shell, Network Transport Stack (NTS) Language : Vivado HLS
Definition in file iprx.cpp.