cloudFPGA (cF) API  1.0
The documentation of the source code of cloudFPGA (cF)
kernel_mc.cpp File Reference
#include <limits>
#include "../../common/include/common.hpp"
#include "../include/kernel_mceuropeanengine.hpp"
#include "xf_fintech/mc_engine.hpp"
#include "xf_fintech/rng.hpp"
Include dependency graph for kernel_mc.cpp:

Go to the source code of this file.

Functions

void kernel_mc (DtUsedInt loop_nm, DtUsedInt seed, double underlying, double volatility, double dividendYield, double riskFreeRate, double timeLength, double strike, DtUsedInt optionType, double out[1024], double requiredTolerance, DtUsedInt requiredSamples, DtUsedInt timeSteps, DtUsedInt maxSamples, bool *finished)
 

Function Documentation

◆ kernel_mc()

void kernel_mc ( DtUsedInt  loop_nm,
DtUsedInt  seed,
double  underlying,
double  volatility,
double  dividendYield,
double  riskFreeRate,
double  timeLength,
double  strike,
DtUsedInt  optionType,
double  out[1024],
double  requiredTolerance,
DtUsedInt  requiredSamples,
DtUsedInt  timeSteps,
DtUsedInt  maxSamples,
bool *  finished 
)

Copyright 2016 – 2022 IBM Corporation

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

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Definition at line 50 of file kernel_mc.cpp.

64  {
65 /*
66 #pragma HLS INTERFACE m_axi port = out bundle = gmem latency = 125
67 
68 #pragma HLS INTERFACE s_axilite port = loop_nm bundle = control
69 #pragma HLS INTERFACE s_axilite port = seed bundle = control
70 #pragma HLS INTERFACE s_axilite port = out bundle = control
71 #pragma HLS INTERFACE s_axilite port = strike bundle = control
72 #pragma HLS INTERFACE s_axilite port = underlying bundle = control
73 #pragma HLS INTERFACE s_axilite port = volatility bundle = control
74 #pragma HLS INTERFACE s_axilite port = dividendYield bundle = control
75 #pragma HLS INTERFACE s_axilite port = riskFreeRate bundle = control
76 #pragma HLS INTERFACE s_axilite port = timeLength bundle = control
77 #pragma HLS INTERFACE s_axilite port = requiredTolerance bundle = control
78 #pragma HLS INTERFACE s_axilite port = requiredSamples bundle = control
79 #pragma HLS INTERFACE s_axilite port = timeSteps bundle = control
80 #pragma HLS INTERFACE s_axilite port = maxSamples bundle = control
81 #pragma HLS INTERFACE s_axilite port = optionType bundle = control
82 #pragma HLS INTERFACE s_axilite port = return bundle = control
83 */
84 //#pragma HLS inline off
85 #pragma HLS data_pack variable = out
86 #ifndef __SYNTHESIS__
87 #ifdef XF_DEBUG
88  std::cout << "loop_nm =" << loop_nm << std::endl;
89  std::cout << "seed =" << seed << std::endl;
90  std::cout << "underlying=" << underlying << std::endl;
91  std::cout << "volatility=" << volatility << std::endl;
92  std::cout << "dividendYield=" << dividendYield << std::endl;
93  std::cout << "riskFreeRate=" << riskFreeRate << std::endl;
94  std::cout << "timeLength=" << timeLength << std::endl;
95  std::cout << "strike=" << strike << std::endl;
96  std::cout << "optionType=" << optionType << std::endl;
97  std::cout << "requiredTolerance=" << requiredTolerance << std::endl;
98  std::cout << "requiredSamples=" << requiredSamples << std::endl;
99  std::cout << "timeSteps=" << timeSteps << std::endl;
100  std::cout << "maxSamples=" << maxSamples << std::endl;
101 #endif
102 #endif
103  *finished = false;
104 
105  /* Since the kernel is returning an output array and not a stream, so that we can identify
106  * when this will be full, we assign a NaN value on the last element of the array. This
107  * will be our flag for the termination of the kernel, since this region is in dataflow.
108  * WARNING: If by chance, the kernel will return NaN, the external FSM will be blocked!
109  */
110  out[loop_nm-1] = (DtUsed)std::numeric_limits<double>::quiet_NaN();
111 
112  #ifdef FAKE_MCEuropeanEngine
117  for (unsigned int i = 0; i < OUTDEP; i++) {
118  out[i] = (DtUsed)i + offset;
119  }
120  #else // FAKE_MCEuropeanEngine
121  ap_uint<32> seeds[MCM_NM];
122  for (int i = 0; i < MCM_NM; ++i) {
123  seeds[i] = seed + i * 1000;
124  }
125  for (int i = 0; i < loop_nm; ++i) {
126  xf::fintech::MCEuropeanEngine<DtUsed, MCM_NM>(underlying, volatility, dividendYield, riskFreeRate, timeLength,
127  strike, optionType, seeds, &out[i], requiredTolerance,
129  }
130  #endif // FAKE_MCEuropeanEngine
131  if (out[loop_nm-1] != (DtUsed)std::numeric_limits<double>::quiet_NaN()) {
132  *finished = true;
133  }
134 }
#define OUTDEP
Definition: config.h:63
#define DtUsed
Definition: config.h:57
#define MCM_NM
Definition: config.h:60
int timeSteps
Definition: test.py:37
int requiredSamples
Definition: test.py:36
float volatility
Definition: test.py:29
int optionType
Definition: test.py:34
int seed
Definition: test.py:27
float strike
Definition: test.py:33
int timeLength
Definition: test.py:32
float requiredTolerance
Definition: test.py:35
float underlying
Definition: test.py:28
int maxSamples
Definition: test.py:38
float riskFreeRate
Definition: test.py:31
out
Definition: test.py:12
float dividendYield
Definition: test.py:30
int loop_nm
Definition: test.py:26