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cloudFPGA (cF) API
1.0
The documentation of the source code of cloudFPGA (cF)
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: Testbench for Memtest. More...
#include "../../memtest/include/memtest.hpp"#include "../../common/src/common.cpp"#include <math.h>Go to the source code of this file.
Macros | |
| #define | THIS_NAME "TB" |
| #define | TRACE_OFF 0x0000 |
| #define | TRACE_URIF 1 << 1 |
| #define | TRACE_UAF 1 << 2 |
| #define | TRACE_MMIO 1 << 3 |
| #define | TRACE_ALL 0xFFFF |
| #define | DEBUG_MULTI_RUNS True |
| #define | TB_MULTI_RUNS_ITERATIONS 2 |
| #define | DEBUG_LEVEL (TRACE_ALL) |
| #define | OK true |
| #define | KO false |
| #define | VALID true |
| #define | UNVALID false |
| #define | DEBUG_TRACE true |
| #define | ENABLED (ap_uint<1>)1 |
| #define | DISABLED (ap_uint<1>)0 |
| #define | MEMORY_LINES_512 TOTMEMDW_512 /* 64 KiB */ |
Functions | |
| stream< UdpWord > | sSHL_Uaf_Data ("sSHL_Uaf_Data") |
| stream< UdpWord > | sUAF_Shl_Data ("sUAF_Shl_Data") |
| stream< UdpWord > | image_stream_from_memtest ("image_stream_from_memtest") |
| stream< NetworkMetaStream > | siUdp_meta ("siUdp_meta") |
| stream< NetworkMetaStream > | soUdp_meta ("soUdp_meta") |
| void | stepDut () |
| Run a single iteration of the DUT model. More... | |
| int | main (int argc, char **argv) |
| Main testbench of Hrris. More... | |
Variables | |
| ap_uint< 1 > | piSHL_This_MmioPostPktEn |
| ap_uint< 1 > | piSHL_This_MmioCaptPktEn |
| ap_uint< 32 > | s_udp_rx_ports = 0x0 |
| ap_uint< 32 > | node_rank |
| ap_uint< 32 > | cluster_size |
| unsigned int | simCnt |
| membus_t | lcl_mem0 [16384] |
| membus_t | lcl_mem1 [16384] |
: Testbench for Memtest.
System: : cloudFPGA Component : Role Language : Vivado HLS
Created: September 2021 Authors: FAB, WEI, NGL, DID, DCO
Copyright 2009-2015 - Xilinx Inc. - All rights reserved. Copyright 2015-2021 - IBM Research - All Rights Reserved.
Definition in file test_memtest.cpp.