#include <cstdio>
#include <iostream>
#include <fstream>
#include <map>
#include <set>
#include <string>
#include <unistd.h>
#include "../../../../../NTS/nts_config.hpp"
#include "../../../../../NTS/nts_utils.hpp"
#include "../../../../../NTS/SimNtsUtils.hpp"
#include "../../../../../NTS/SimAppData.hpp"
#include "../../../../../NTS/SimIp4Packet.hpp"
#include "../../../../../NTS/toe/src/toe.hpp"
#include "../../../../../NTS/toe/src/toe_utils.hpp"
#include "../../../../../NTS/toe/test/dummy_memory/dummy_memory.hpp"
#include "../../../../toe/src/session_lookup_controller/session_lookup_controller.hpp"
#include "../../../../toe/src/state_table/state_table.hpp"
#include "../../../../toe/src/rx_sar_table/rx_sar_table.hpp"
#include "../../../../toe/src/tx_sar_table/tx_sar_table.hpp"
#include "../../../../toe/src/timers/timers.hpp"
#include "../../../../toe/src/event_engine/event_engine.hpp"
#include "../../../../toe/src/ack_delay/src/ack_delay.hpp"
#include "../../../../toe/src/port_table/port_table.hpp"
#include "../../../../toe/src/rx_engine/src/rx_engine.hpp"
#include "../../../../toe/src/tx_app_interface/tx_app_interface.hpp"

Include dependency graph for test_tx_engine.hpp:

This graph shows which files directly or indirectly include this file:

Macros
#define	TB_STARTUP_DELAY (TOE_SIZEOF_LISTEN_PORT_TABLE)

#define	TB_GRACE_TIME 2500

#define	TB_STARTUP_TIME 25

#define	DEFAULT_FPGA_IP4_ADDR 0x0A0CC801

#define	DEFAULT_FPGA_LSN_PORT 0x0057

#define	DEFAULT_FPGA_SND_PORT TOE_FIRST_EPHEMERAL_PORT_NUM

#define	DEFAULT_HOST_IP4_ADDR 0x0A0CC832

#define	DEFAULT_HOST_LSN_PORT 0x0058

#define	DEFAULT_HOST_SND_PORT 0x8058

#define	APP_RSP_LATENCY 10

#define	MEM_RD_CMD_LATENCY 10

#define	MEM_RD_DAT_LATENCY 10

#define	MEM_RD_STS_LATENCY 10

#define	MEM_WR_CMD_LATENCY 10

#define	MEM_WR_DAT_LATENCY 10

#define	MEM_WR_STS_LATENCY 10

#define	CAM_LOOKUP_LATENCY 1

#define	CAM_UPDATE_LATENCY 10

#define	RTT_LINK 25

#define	FPGA_CLIENT_CONNECT_TIMEOUT 250

Enumerations
enum	TestingMode { RX_MODE ='0' , TX_MODE ='1' , BIDIR_MODE ='2' , ECHO_MODE ='3' , RX_MODE ='0' , TX_MODE ='1' , BIDIR_MODE ='2' , ECHO_MODE ='3' , RX_MODE ='0' , TX_MODE ='1' , BIDIR_MODE ='2' , ECHO_MODE ='3' }

Variables
bool	gTraceEvent = false

bool	gFatalError = false

unsigned int	gSimCycCnt = 0

unsigned int	gMaxSimCycles = ( 0x8000 ) + 2500

Ip4Addr	gFpgaIp4Addr = 0x0A0CC801

TcpPort	gFpgaLsnPort = 0x0057

TcpPort	gFpgaSndPort = 0x8000

Ip4Addr	gHostIp4Addr = 0x0A0CC832

TcpPort	gHostLsnPort = 0x0058

bool	gSortTaifGold = false

bool	gTest_RcvdIp4Packet = true

bool	gTest_RcvdIp4TotLen = true

bool	gTest_RcvdIp4HdrCsum = true

bool	gTest_RcvdUdpLen = true

bool	gTest_RcvdLy4Csum = true

bool	gTest_SentIp4TotLen = true

bool	gTest_SentIp4HdrCsum = true

bool	gTest_SentUdpLen = true

bool	gTest_SentLy4Csum = true

Macros

Enumerations

Variables