cloudFPGA (cF) API  1.0
The documentation of the source code of cloudFPGA (cF)
tx_engine.cpp File Reference

: Tx Engine (TXe) of the TCP Offload Engine (TOE). More...

#include "tx_engine.hpp"
Include dependency graph for tx_engine.cpp:

Go to the source code of this file.

Macros

#define THIS_NAME   "TOE/TXe"
 
#define FIXME   1
 
#define TRACE_OFF   0x0000
 
#define TRACE_MDL   1 << 1
 
#define TRACE_IHC   1 << 2
 
#define TRACE_SPS   1 << 3
 
#define TRACE_PHC   1 << 4
 
#define TRACE_MRD   1 << 5
 
#define TRACE_TSS   1 << 6
 
#define TRACE_SCA   1 << 7
 
#define TRACE_TCA   1 << 8
 
#define TRACE_IPS   1 << 9
 
#define TRACE_ALL   0xFFFF
 
#define DEBUG_LEVEL   (TRACE_OFF)
 

Functions

void pMetaDataLoader (stream< ExtendedEvent > &siAKd_Event, stream< SessionId > &soRSt_RxSarReq, stream< RxSarReply > &siRSt_RxSarRep, stream< TXeTxSarQuery > &soTSt_TxSarQry, stream< TXeTxSarReply > &siTSt_TxSarRep, stream< TXeReTransTimerCmd > &soTIm_ReTxTimerCmd, stream< SessionId > &soTIm_SetProbeTimer, stream< TcpDatLen > &soIhc_TcpDatLen, stream< TXeMeta > &soPhc_TxeMeta, stream< DmCmd > &soMrd_BufferRdCmd, stream< SessionId > &soSLc_ReverseLkpReq, stream< StsBool > &soSps_IsLookup, stream< LE_SocketPair > &soSps_RstSockPair, stream< SigBit > &soEVe_RxEventSig)
 Meta Data Loader (Mdl) More...
 
void pSocketPairSplitter (stream< fourTuple > &siSLc_ReverseLkpRsp, stream< LE_SocketPair > &siMdl_RstSockPair, stream< StsBool > &siMdl_IsLookup, stream< IpAddrPair > &soIhc_IpAddrPair, stream< SocketPair > &soPhc_SocketPair)
 
void pIpHeaderConstructor (stream< TcpDatLen > &siMdl_TcpDatLen, stream< IpAddrPair > &siSps_IpAddrPair, stream< AxisIp4 > &soIPs_IpHeader)
 IPv4 Header Constructor (Ihc) More...
 
void pPseudoHeaderConstructor (stream< TXeMeta > &siMdl_TxeMeta, stream< SocketPair > &siSps_SockPair, stream< AxisPsd4 > &soTss_PseudoHdr)
 Pseudo Header Constructor (Phc) More...
 
void pTcpSegStitcher (stream< AxisPsd4 > &siPhc_PseudoHdr, stream< AxisApp > &siMEM_TxP_Data, stream< AxisPsd4 > &soSca_PseudoPkt, stream< FlagBool > &siMrd_SplitSegFlag)
 
void pSubChecksumAccumulators (stream< AxisPsd4 > &siTss_PseudoPkt, stream< AxisPsd4 > &soIps_PseudoPkt, stream< SubCSums > &soTca_4SubCsums)
 Sub-Checksum Accumulator (Sca) More...
 
void pTcpChecksumAccumulator (stream< SubCSums > &siSca_FourSubCsums, stream< TcpChecksum > &soIps_TcpCsum)
 TCP Checksum Accumulator (Tca) More...
 
void pIpPktStitcher (stream< AxisIp4 > &siIhc_IpHeader, stream< AxisPsd4 > &siSca_PseudoPkt, stream< TcpChecksum > &siTca_TcpCsum, stream< AxisIp4 > &soIPTX_Data)
 IPv4 Packet Stitcher (Ips) More...
 
void pTxMemoryReader (stream< DmCmd > &siMdl_BufferRdCmd, stream< DmCmd > &soMEM_TxpRdCmd, stream< FlagBool > &soTss_SplitMemAcc)
 Tx Memory Reader (Mrd) More...
 
void tx_engine (stream< ExtendedEvent > &siAKd_Event, stream< SigBit > &soEVe_RxEventSig, stream< SessionId > &soRSt_RxSarReq, stream< RxSarReply > &siRSt_RxSarRep, stream< TXeTxSarQuery > &soTSt_TxSarQry, stream< TXeTxSarReply > &siTSt_TxSarRep, stream< DmCmd > &soMEM_Txp_RdCmd, stream< AxisApp > &siMEM_TxP_Data, stream< TXeReTransTimerCmd > &soTIm_ReTxTimerCmd, stream< SessionId > &soTIm_SetProbeTimer, stream< SessionId > &soSLc_ReverseLkpReq, stream< fourTuple > &siSLc_ReverseLkpRep, stream< AxisIp4 > &soIPTX_Data)
 Transmit Engine (TXe) More...
 

Variables

bool gTraceEvent
 

Detailed Description

: Tx Engine (TXe) of the TCP Offload Engine (TOE).

Copyright 2016 – 2021 IBM Corporation

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. Copyright (c) 2015, Xilinx, Inc.

All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

System: : cloudFPGA Component : Shell, Network Transport Stack (NTS) Language : Vivado HLS

Definition in file tx_engine.cpp.