cloudFPGA (cF) API  1.0
The documentation of the source code of cloudFPGA (cF)
sobel_processing.hpp
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1 
17 
34 #ifndef _ROLE_SOBEL_PROCESSING_HPP_
35 #define _ROLE_SOBEL_PROCESSING_HPP_
36 
37 
38 #define FSM_PROCESSING_WAIT_FOR_META 0
39 #define FSM_PROCESSING_PCKT_PROC 1
40 #define FSM_PROCESSING_STOP 2
41 #define FSM_PROCESSING_START 3
42 #define FSM_PROCESSING_BURST_READING 4
43 #define FSM_PROCESSING_DATAFLOW_WRITE 5
44 #define FSM_PROCESSING_DATAFLOW_READ 6
45 #define FSM_PROCESSING_OUTPUT 7
46 #define FSM_PROCESSING_OUTPUT_2 8
47 #define FSM_PROCESSING_OUTPUT_3 9
48 #define FSM_PROCESSING_OUTPUT_4 10
49 #define FSM_PROCESSING_OUTPUT_5 11
50 #define FSM_PROCESSING_CONTINUOUS_RUN 12
51 #define FSM_PROCESSING_WAIT_FOR_DDR_CONTROLLER_EMPTYNESS 13
52 #define ProcessingFsmType uint8_t
53 
54 
55 
56 
79 
91  template<const unsigned int counter_width=64>
93  stream<NetworkWord> &sRxpToProcp_Data,
94  stream<NetworkWord> &sProcpToTxp_Data,
95  stream<NetworkMetaStream> &sRxtoProc_Meta,
96  stream<NetworkMetaStream> &sProctoTx_Meta,
97  bool * start_stop//,
98  #ifdef ENABLE_DDR
99  ,
100  //------------------------------------------------------
101  //-- SHELL / Role / Mem / Mp1 Interface
102  //------------------------------------------------------
105  #endif
106 ){
107  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
108 #pragma HLS INLINE off
109  //-- LOCAL VARIABLES ------------------------------------------------------
110  NetworkWord netWord;
111  NetworkWord outNetWord;
112  static NetworkMetaStream outNetMeta = NetworkMetaStream();;
114 
115  static ap_uint<16> max_iterations;
116 
117  static local_mem_addr_t first_faulty_address;
118 
119  static ap_uint<32> faulty_addresses_cntr;
120 
121  static local_mem_addr_t max_address_under_test; // byte addressable;
122  static size_t bytes_sent_for_tx =0;
123 
124 #pragma HLS reset variable=processingFSM
125 #pragma HLS reset variable=outNetMeta
126 #pragma HLS reset variable=max_iterations
127 #pragma HLS reset variable=first_faulty_address
128 #pragma HLS reset variable=faulty_addresses_cntr
129 #pragma HLS reset variable=max_address_under_test
130 #pragma HLS reset variable=processingFSM
131 #pragma HLS reset variable=bytes_sent_for_tx
132 
133  static ap_uint<32> testCounter;
134  static ap_uint<counter_width> reading_cntr = 0;
135  static ap_uint<counter_width> writing_cntr = 0;
136  static unsigned int burst_size=1;
137  static local_mem_addr_t tmp_wordaligned_address = 0;
138  static int emptycntr=0;
139 
140 #pragma HLS reset variable=testCounter
141 #pragma HLS reset variable=tmp_wordaligned_address
142 #pragma HLS reset variable=burst_size
143 
144 
145 //assuming that whnever I send a start I must complete the run and then restart unless a stop
146 // or stopping once done with the run iterations
147  switch(processingFSM)
148  {
150  #if DEBUG_LEVEL == TRACE_ALL
151  printf("DEBUG proc FSM, I am in the WAIT_FOR_META state\n");
152  #endif
153  //resetting once per test suite
154  max_address_under_test = 0;
155  max_iterations=0;
156  bytes_sent_for_tx = 0;
157  burst_size=1;
158  if ( !sRxtoProc_Meta.empty() && !sProctoTx_Meta.full())
159  {
160  outNetMeta = sRxtoProc_Meta.read();
161  sProctoTx_Meta.write(outNetMeta);
163  }
164  break;
165 
167  #if DEBUG_LEVEL == TRACE_ALL
168  printf("DEBUG proc FSM, I am in the PROCESSING_PCKT_PROC state\n");
169  #endif
170 //parse the received data
171  if ( !sRxpToProcp_Data.empty() && !sProcpToTxp_Data.full())
172  {
173  netWord = sRxpToProcp_Data.read();
175  {
176  case TEST_INVLD_CMD:
177  /* FWD an echo of the invalid*/
178  #if DEBUG_LEVEL == TRACE_ALL
179  printf("DEBUG processing the packet with invalid cmd\n");
180  #endif
181  sProcpToTxp_Data.write(netWord);
183  break;
184  case TEST_STOP_CMD:
185  /* call with stop (never started), unset, fwd the stop */
186  #if DEBUG_LEVEL == TRACE_ALL
187  printf("DEBUG processing the packet with stop cmd\n");
188  #endif
189  outNetWord.tdata=TEST_STOP_CMD;
190  outNetWord.tkeep = 0xFF;
191  outNetWord.tlast = 1;
192  sProcpToTxp_Data.write(outNetWord);
194  break;
195  default:
196  /* Execute the test if not invalid or stop*/
197  #if DEBUG_LEVEL == TRACE_ALL
198  printf("DEBUG processing the packet with the address within cmd\n");
199  #endif
200  max_address_under_test = netWord.tdata(MEMTEST_ADDRESS_HIGH_BIT,MEMTEST_ADDRESS_LOW_BIT);
201  max_iterations = netWord.tdata.range(MEMTEST_ITERATIONS_HIGH_BIT,MEMTEST_ITERATIONS_LOW_BIT);
202  #if DEBUG_LEVEL == TRACE_ALL
203  #ifndef __SYNTHESIS__
204  printf("DEBUG processing the packet with the address %s within cmd %s\n", max_address_under_test.to_string().c_str(), max_iterations.to_string().c_str());
205  #endif //__SYNTHESIS__
206  #endif
208  break;
209  }
210  }
211  break;
212 
214  #if DEBUG_LEVEL == TRACE_ALL
215  printf("DEBUG proc FSM, I am in the FSM_PROCESSING_BURST_READING state\n");
216  #endif
217 //parse the received data
218  if ( !sRxpToProcp_Data.empty())
219  {
220  netWord = sRxpToProcp_Data.read();
221  #if DEBUG_LEVEL == TRACE_ALL
222  std::cout << netWord.tdata.to_string() << std::endl;
223  #endif
225  {
226  case TEST_BURSTSIZE_CMD:
227  /* extract the busrt size*/
228  burst_size = netWord.tdata.range(MEMTEST_BURST_HIGH_BIT,MEMTEST_BURST_LOW_BIT);
229 
230  #if DEBUG_LEVEL == TRACE_ALL
231  printf("DEBUG processing the packet with burst cmd, and burst size=%u\n",burst_size);
232  #endif
234  break;
235 
236 
237  default:
238  /*unkown stuff hence using a burst with 1 beat*/
239  #if DEBUG_LEVEL == TRACE_ALL
240  #ifndef __SYNTHESIS__
241  printf("DEBUG processing the packet with smth bad within cmd: %s\n",netWord.tdata.range(MEMTEST_COMMANDS_HIGH_BIT,MEMTEST_COMMANDS_LOW_BIT).to_string().c_str());
242  #endif
243  #endif
244  burst_size=1;
245  sProcpToTxp_Data.write(netWord);
247  break;
248  }
249  }
250  break;
251 
252 //The hw can begin to do something
254  // sOCMDPerfCounter.write(0);//init the counter
255  #if DEBUG_LEVEL == TRACE_ALL
256  printf("DEBUG proc FSM, I am in the START state\n");
257  #endif
258  //setting everything ready to start
259  first_faulty_address = 0;
260  faulty_addresses_cntr = 0;
261  if(max_address_under_test%64==0){
262  tmp_wordaligned_address = max_address_under_test/64;
263  } else {
264  tmp_wordaligned_address = (max_address_under_test/64+1);
265  }
266  #if DEBUG_LEVEL == TRACE_ALL
267  #ifndef __SYNTHESIS__
268  std::cout << " testing the address word aligned" << tmp_wordaligned_address.to_string() << std::endl;
269  #endif
270  #endif
271  reading_cntr = 0;
272  writing_cntr = 0;
273  testCounter = 0;
274  processingFSM = FSM_PROCESSING_DATAFLOW_WRITE;//FSM_PROCESSING_WRITE;
275  break;
276 
277  //run continuously, hence more than once
279  testCounter += 1;
280  reading_cntr = 0;
281  writing_cntr = 0;
282  faulty_addresses_cntr = 0;
283  first_faulty_address = 0;
284 
285  //stopping conditions: either a Stop or the maximum iterations
286  if(*start_stop && testCounter < max_iterations){
287  #if DEBUG_LEVEL == TRACE_ALL
288  #ifndef __SYNTHESIS__
289  printf("DEBUG processing continuous run (still run, iter %s) max iters: %s\n",testCounter.to_string().c_str(),max_iterations.to_string().c_str());
290  #endif //__SYNTHESIS__
291  #endif
292  // check if need another meta to send out!
293  // if already over the MTU size, or with a command (stop case) or with another iteration I need to send out another meta
294  if(bytes_sent_for_tx >= PACK_SIZE){
295  sProctoTx_Meta.write(outNetMeta);
296  #if DEBUG_LEVEL == TRACE_ALL
297  std::cout << "DEBUG: writing an additional meta with bytes sent equal to " << bytes_sent_for_tx << std::endl;
298  #endif
299  bytes_sent_for_tx = 0;
300  }
302 
303  break;
304  }else{
305  #if DEBUG_LEVEL == TRACE_ALL
306  #ifndef __SYNTHESIS__
307  printf("DEBUG processing continuous run (stop the run at iter %s) max iters: %s \n",testCounter.to_string().c_str(),max_iterations.to_string().c_str());
308  #endif //__SYNTHESIS__
309  #endif
310  //signal the end of the packet with the iteration of the tests performed
312  outNetWord.tdata.range(NETWORK_WORD_BIT_WIDTH-1,MEMTEST_COMMANDS_HIGH_BIT+1)=testCounter;
313  outNetWord.tkeep = 0xFF;
314  outNetWord.tlast = 1;
315  sProcpToTxp_Data.write(outNetWord);
317  break;
318  }
319 
325  //Begin to process
327  #if DEBUG_LEVEL == TRACE_ALL
328  printf("DEBUG processing write dataflow\n");
329  #endif
330  pWriteDataflowMemTest<top_param_maximum_number_of_beats>( lcl_mem0,
331  tmp_wordaligned_address , &writing_cntr,&testCounter,burst_size);
333  break;
334 
336  #if DEBUG_LEVEL == TRACE_ALL
337  printf("DEBUG processing the output of a run\n");
338  #endif
339  emptycntr++;
340  if(emptycntr==DDR_LATENCY+1){
342  emptycntr=0;
343  }
344  break;
345 
347 #if DEBUG_LEVEL == TRACE_ALL
348  printf("DEBUG processing read dataflow\n");
349 #endif
350  pReadDataflowMemTest<top_param_maximum_number_of_beats>(lcl_mem1,
351  tmp_wordaligned_address ,&reading_cntr,&faulty_addresses_cntr, &first_faulty_address,burst_size);
353  break;
354 
361  #if DEBUG_LEVEL == TRACE_ALL
362  printf("DEBUG processing the output of a run\n");
363  #endif
364  if(!sProcpToTxp_Data.full()){
365  outNetWord.tdata = max_address_under_test;
366  outNetWord.tkeep = 0xFF;
367  outNetWord.tlast = 0;
368  sProcpToTxp_Data.write(outNetWord);
369  bytes_sent_for_tx += 8;
371  }
372  break;
373 
375  #if DEBUG_LEVEL == TRACE_ALL
376  #ifndef __SYNTHESIS__
377  printf("DEBUG processing the output of a run part 2; faulty address cntr %s\n",faulty_addresses_cntr.to_string().c_str());
378  #endif
379  #endif
380  if(!sProcpToTxp_Data.full()){
381  outNetWord.tdata=faulty_addresses_cntr;
382  outNetWord.tkeep = 0xFF;
383  outNetWord.tlast = 0;
384  sProcpToTxp_Data.write(outNetWord);
385  bytes_sent_for_tx += 8 ;
387  }
388  break;
390  #if DEBUG_LEVEL == TRACE_ALL
391  #ifndef __SYNTHESIS__
392  printf("DEBUG processing the output of a run part 3: first faulty address %s\n",first_faulty_address.to_string().c_str());
393  #endif
394  #endif
395  if(!sProcpToTxp_Data.full()){
396  outNetWord.tdata=first_faulty_address;
397  outNetWord.tkeep = 0xFF;
398  outNetWord.tlast = 0;
399  sProcpToTxp_Data.write(outNetWord);
400  bytes_sent_for_tx += 8;
402  }
403  break;
405  #if DEBUG_LEVEL == TRACE_ALL
406  printf("DEBUG processing the output of a run part 4\n");
407  #endif
408  if(!sProcpToTxp_Data.full()){
409  outNetWord.tdata = writing_cntr;
410  outNetWord.tkeep = 0xFF;
411  outNetWord.tlast = 0;
412  sProcpToTxp_Data.write(outNetWord);
413  bytes_sent_for_tx += 8;
415  }
416  break;
418  #if DEBUG_LEVEL == TRACE_ALL
419  printf("DEBUG processing the output of a run part 4\n");
420  #endif
421  if(!sProcpToTxp_Data.full()){
422  outNetWord.tdata= reading_cntr;
423  outNetWord.tkeep = 0xFF;
424  outNetWord.tlast = 0;
425  sProcpToTxp_Data.write(outNetWord);
426  bytes_sent_for_tx += 8;
428  }
429  break;
430 
431  }
432 };
433 
434 
435 
436 
437 
448 #ifndef ENABLE_DDR
449 template <typename TimgIn=ap_uint<INPUT_PTR_WIDTH>, typename TimgOut=ap_uint<OUTPUT_PTR_WIDTH>>
450 #endif // ENABLE_DDR
452  stream<NetworkWord> &sRxpToTxp_Data,
453  #ifdef ENABLE_DDR
454  //---- P1 Memory mapped ---------------
455  membus_t *lcl_mem0,
457  #else // !ENABLE_DDR
458  stream<TimgIn> &img_in_axi_stream,
459  stream<TimgOut> &img_out_axi_stream,
460  #endif // ENABLE_DDR
461  stream<bool> &sImageLoaded
462  )
463 {
464  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
465  #pragma HLS INLINE off
466  #pragma HLS pipeline II=1
467 
468  //-- LOCAL VARIABLES ------------------------------------------------------
469  NetworkWord newWord;
470  uint16_t Thresh = 442;
471  float K = 0.04;
472  uint16_t k = K * (1 << 16); // Convert to Q0.16 format
473  static bool accel_called;
474  static unsigned int processed_word_proc;
475  static unsigned int timeoutCntAbs;
476  static unsigned int cnt_i;
477  static membus_t tmp;
478  TimgOut raw64;
479  Data_t_out temp;
480  #ifdef ENABLE_DDR
481  //static stream<ap_uint<OUTPUT_PTR_WIDTH>> img_out_axi_stream ("img_out_axi_stream");
482  //#pragma HLS stream variable=img_out_axi_stream depth=9
483  static unsigned int ddr_addr_out;
484  #pragma HLS reset variable=ddr_addr_out
485  #endif
486  static PacketFsmType SobelFSM = WAIT_FOR_META;
487  #pragma HLS reset variable=SobelFSM
488 
489  #pragma HLS reset variable=accel_called
490  #pragma HLS reset variable=processed_word_proc
491  #pragma HLS reset variable=timeoutCntAbs
492  #pragma HLS reset variable=cnt_i
493  #pragma HLS reset variable=tmp
494  #pragma HLS reset variable=raw64
495  #pragma HLS reset variable=temp
496 
497  switch(SobelFSM)
498  {
499  case WAIT_FOR_META:
500  printf("DEBUG in pProcPath: WAIT_FOR_META\n");
501  if (!sImageLoaded.empty())
502  {
503  if (sImageLoaded.read() == true) {
504  SobelFSM = PROCESSING_PACKET;
505  accel_called = false;
506  processed_word_proc = 0;
507  #ifdef ENABLE_DDR
508  ddr_addr_out = 0;
509  timeoutCntAbs = 0;
510  cnt_i = 0;
511  #endif
512  }
513  }
514  break;
515 
516  case PROCESSING_PACKET:
517  printf("DEBUG in pProcPath: PROCESSING_PACKET\n");
518  #ifndef ENABLE_DDR
519  if ( !img_in_axi_stream.empty() && !img_out_axi_stream.full() )
520  {
521  #endif
522  if (accel_called == false) {
523  #ifdef ENABLE_DDR
525  #else // ! ENABLE_DDR
526  #ifdef FAKE_Sobel
527  fakeSobelAccelStream(img_in_axi_stream, img_out_axi_stream, MIN_RX_LOOPS, MIN_TX_LOOPS);
528  #else // !FAKE_Sobel
529  medianBlurAccelStream(img_in_axi_stream, img_out_axi_stream, WIDTH, HEIGHT);
530  #endif // FAKE_Sobel
531  #endif // ENABLE_DDR
532  accel_called = true;
533  SobelFSM = SOBEL_RETURN_RESULTS;
534  }
535  #ifndef ENABLE_DDR
536  }
537  #endif
538  break;
539 
540  #ifdef ENABLE_DDR
542  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS, ddr_addr_out=%u\n", ddr_addr_out);
543  if (accel_called == true) {
544 
545  printf("DEBUG in pProcPath: Accumulated %u net words (%u B) to complete a single DDR word\n",
547  tmp = lcl_mem1[ddr_addr_out];
548  ddr_addr_out++;
550  timeoutCntAbs = 0;
551  }
552  break;
553 
555  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT [%u out of %u]\n", timeoutCntAbs, DDR_LATENCY);
556  if (timeoutCntAbs++ == DDR_LATENCY) {
557  SobelFSM = SOBEL_RETURN_RESULTS_FWD; //SOBEL_RETURN_RESULTS_UNPACK;
558  cnt_i = 0;
559  }
560  break;
561  /*
562  case SOBEL_RETURN_RESULTS_UNPACK:
563  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS_UNPACK, cnt_i=%u\n", cnt_i);
564  //for (unsigned int cnt_i=0; cnt_i<(MEMDW_512/OUTPUT_PTR_WIDTH); cnt_i++) {
565  #if OUTPUT_PTR_WIDTH == 64
566  raw64(0 ,63) = tmp(cnt_i*OUTPUT_PTR_WIDTH , cnt_i*OUTPUT_PTR_WIDTH+63);
567  #endif
568  if ( !img_out_axi_stream.full() ) {
569  img_out_axi_stream.write(raw64);
570  }
571  if (cnt_i == (MEMDW_512/OUTPUT_PTR_WIDTH) - 1) {
572  SobelFSM = SOBEL_RETURN_RESULTS_FWD;
573  }
574  cnt_i++;
575  //}
576  break;
577  */
579  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS_FWD\n");
580  //if ( !img_out_axi_stream.empty() && !sRxpToTxp_Data.full() ) {
581  if ( (cnt_i <= (MEMDW_512/OUTPUT_PTR_WIDTH) - 1) && !sRxpToTxp_Data.full() ) {
582 
583  //temp.data = img_out_axi_stream.read();
584  temp.data(0 ,63) = tmp(cnt_i*OUTPUT_PTR_WIDTH , cnt_i*OUTPUT_PTR_WIDTH+63);
585  if (processed_word_proc++ == MIN_TX_LOOPS-1) {
586  temp.last = 1;
587  SobelFSM = WAIT_FOR_META;
588  }
589  else {
590  temp.last = 0;
591  }
592  //TODO: find why Vitis kernel does not set keep and last by itself
593  temp.keep = 255;
594  newWord = NetworkWord(temp.data, temp.keep, temp.last);
595  sRxpToTxp_Data.write(newWord);
596  cnt_i++;
597  }
598  else {
599  SobelFSM = SOBEL_RETURN_RESULTS;
600  }
601 
602  break;
603 
604  #else // ! ENABLE_DDR
606  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS\n");
607  if ( !img_out_axi_stream.empty() && !sRxpToTxp_Data.full() )
608  {
609 
610  temp.data = img_out_axi_stream.read();
611  if ( img_out_axi_stream.empty() )
612  //if (processed_word_proc++ == MIN_TX_LOOPS-1)
613  {
614  temp.last = 1;
615  SobelFSM = WAIT_FOR_META;
616  accel_called = false;
617  }
618  else
619  {
620  temp.last = 0;
621  }
622  //TODO: find why Vitis kernel does not set keep and last by itself
623  temp.keep = 255;
624  newWord = NetworkWord(temp.data, temp.keep, temp.last);
625  sRxpToTxp_Data.write(newWord);
626  }
627  break;
628  #endif // ENABLE_DDR
629  } // end switch
630 
631 }
632 #endif //_ROLE_SOBEL_PROCESSING_HPP_
#define WIDTH
#define HEIGHT
#define BPERMDW_512
Definition: harris.hpp:120
#define KWPERMDW_512
Definition: harris.hpp:121
#define MIN_TX_LOOPS
#define MIN_RX_LOOPS
#define OUTPUT_PTR_WIDTH
void medianBlurAccelMem(membus_t *img_inp, membus_t *img_out, int rows, int cols)
Top-level accelerated function of the MedianBlur Application with array I/F.
void medianBlurAccelStream(hls::stream< ap_uint< 8 >> &img_in_axi_stream, hls::stream< ap_uint< 64 >> &img_out_axi_stream, int rows, int cols)
Top-level accelerated function of the MedianBlur Application with array I/F.
#define MEMDW_512
Definition: memtest.hpp:90
#define MEMTEST_ADDRESS_HIGH_BIT
ap_uint< 40 > local_mem_addr_t
#define MEMTEST_COMMANDS_HIGH_BIT
Definition: memtest.hpp:67
#define PacketFsmType
Definition: memtest.hpp:76
#define Data_t_out
Definition: memtest.cpp:30
#define DDR_LATENCY
Definition: memtest.hpp:98
#define MEMTEST_ITERATIONS_HIGH_BIT
#define ENABLE_DDR
Definition: memtest.hpp:42
membus_512_t membus_t
Definition: memtest.hpp:92
#define PROCESSING_PACKET
Definition: memtest.hpp:73
#define MEMTEST_BURST_HIGH_BIT
#define MEMTEST_BURST_LOW_BIT
#define MEMTEST_ADDRESS_LOW_BIT
#define MEMTEST_ITERATIONS_LOW_BIT
#define WAIT_FOR_META
Definition: memtest.hpp:71
#define MEMTEST_COMMANDS_LOW_BIT
Definition: memtest.hpp:68
membus_t lcl_mem0[16384]
membus_t lcl_mem1[16384]
#define PACK_SIZE
Definition: config.h:51
#define FSM_PROCESSING_OUTPUT_2
#define FSM_PROCESSING_WAIT_FOR_META
#define ProcessingFsmType
#define FSM_PROCESSING_OUTPUT_3
#define FSM_PROCESSING_WAIT_FOR_DDR_CONTROLLER_EMPTYNESS
#define FSM_PROCESSING_OUTPUT
#define FSM_PROCESSING_CONTINUOUS_RUN
#define FSM_PROCESSING_DATAFLOW_WRITE
void pProcPath(stream< NetworkWord > &sRxpToTxp_Data, stream< TimgIn > &img_in_axi_stream, stream< TimgOut > &img_out_axi_stream, stream< bool > &sImageLoaded)
Processing Path - Main processing FSM for Vitis kernels.
#define SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT
Definition: sobel.hpp:73
#define SOBEL_RETURN_RESULTS
Definition: sobel.hpp:72
#define FSM_PROCESSING_OUTPUT_4
#define FSM_PROCESSING_START
#define FSM_PROCESSING_DATAFLOW_READ
#define SOBEL_RETURN_RESULTS_FWD
Definition: sobel.hpp:75
#define FSM_PROCESSING_BURST_READING
#define FSM_PROCESSING_OUTPUT_5
#define FSM_PROCESSING_PCKT_PROC
void pTHISProcessingData(stream< NetworkWord > &sRxpToProcp_Data, stream< NetworkWord > &sProcpToTxp_Data, stream< NetworkMetaStream > &sRxtoProc_Meta, stream< NetworkMetaStream > &sProctoTx_Meta, bool *start_stop)
THIS processing the data once recieved a start command Template function for custom processing.
void fakeSobelAccelStream(hls::stream< ap_axiu< 256, 0, 0, 0 > > &img_in_axi_stream, hls::stream< ap_axiu< 256, 0, 0, 0 > > &img_out_axi_stream, unsigned int min_rx_loops, unsigned int min_tx_loops)
uint8_t processingFSM
Definition: uppercase.cpp:57
@ TEST_ENDOFTESTS_CMD
Definition: memtest.hpp:60
@ TEST_STOP_CMD
Definition: memtest.hpp:61
@ TEST_BURSTSIZE_CMD
Definition: memtest.hpp:59
@ TEST_INVLD_CMD
Definition: memtest.hpp:63
#define NETWORK_WORD_BIT_WIDTH
Definition: network.hpp:46
ap_uint< 64 > tdata
Definition: network.hpp:49
ap_uint< 8 > tkeep
Definition: network.hpp:50
ap_uint< 1 > tlast
Definition: network.hpp:51