cloudFPGA (cF) API  1.0
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Sobel HLS
cF » cFp » cFp_Zoo » cF Vitis Vision » Sobel

This is a subgroup of Sobel accelerated function with only synthesizable (HLS) functions/classes. More...

Collaboration diagram for Sobel HLS:

Files

file  sobel.hpp
 The Role for a Sobel Example application (UDP or TCP)
 
file  sobel_hw_common.hpp
 A library for some common functionalities: Memory interaction Performance Counters.
 
file  sobel_network_library.hpp
 A library for some common Network-Related functionalities.
 
file  sobel_processing.hpp
 The processing function for the sobel filte.
 
file  xf_config_params.h
 The Sobel IP configuration header.
 
file  sobel.cpp
 The Role for a Sobel Example application (UDP or TCP)
 
file  xf_sobel_accel.cpp
 The Sobel top-level.
 

Classes

struct  Axis< D >
 

Macros

#define ENABLE_DDR
 
#define ROLE_IS_SOBEL
 
#define WAIT_FOR_META   0
 
#define WAIT_FOR_STREAM_PAIR   1
 
#define PROCESSING_PACKET   2
 
#define LOAD_IN_STREAM   3
 
#define SOBEL_RETURN_RESULTS   4
 
#define SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT   5
 
#define SOBEL_RETURN_RESULTS_UNPACK   6
 
#define SOBEL_RETURN_RESULTS_FWD   7
 
#define WAIT_FOR_TX   8
 
#define FSM_IDLE   9
 
#define FSM_CHK_SKIP   10
 
#define FSM_CHK_PROC_BYTES   11
 
#define FSM_CHK_WRT_CHNK_TO_DDR_PND   12
 
#define FSM_WR_PAT_CMD   13
 
#define FSM_WR_PAT_LOAD   14
 
#define FSM_WR_PAT_DATA   15
 
#define FSM_WR_PAT_STS_A   16
 
#define FSM_WR_PAT_STS_B   17
 
#define FSM_WR_PAT_STS_C   18
 
#define PacketFsmType   uint8_t
 
#define DEFAULT_TX_PORT   2718
 
#define DEFAULT_RX_PORT   2718
 
#define Data_t_in   ap_axiu<INPUT_PTR_WIDTH, 0, 0, 0>
 
#define Data_t_out   ap_axiu<OUTPUT_PTR_WIDTH, 0, 0, 0>
 
#define MAX_NB_OF_ELMT_READ   16
 
#define MAX_NB_OF_WORDS_READ   (MAX_NB_OF_ELMT_READ*sizeof(mat_elmt_t)/BPERDW)
 
#define MAX_NB_OF_ELMT_PERDW   (BPERDW/sizeof(mat_elmt_t))
 
#define MEMDW_512   512
 
#define BPERMDW_512   (MEMDW_512/8)
 
#define KWPERMDW_512   (BPERMDW_512/sizeof(TYPE))
 
#define TOTMEMDW_512   (1 + (IMGSIZE - 1) / BPERMDW_512)
 
#define CHECK_CHUNK_SIZE   0x1000
 This define configures tha AXI burst size of DDRM memory-mapped interfaces AXI4 allows 4KiB, but Role's AXI interconnect is configured at max 1KiB 0x40->64, 0x400->1024B(1KiB), 0x1000->4KiB. More...
 
#define BYTE_PER_MEM_WORD   BPERMDW_512
 
#define TRANSFERS_PER_CHUNK   (CHECK_CHUNK_SIZE/BYTE_PER_MEM_WORD)
 
#define TRANSFERS_PER_CHUNK_DIVEND   (TOTMEMDW_512-(TOTMEMDW_512/TRANSFERS_PER_CHUNK)*TRANSFERS_PER_CHUNK)
 
#define fsmStateDDRdef   uint8_t
 
#define CYCLES_UNTIL_TIMEOUT   0x0100
 
#define TYPICAL_DDR_LATENCY   4
 
#define DDR_LATENCY   (52/4)
 
#define EXTRA_DDR_LATENCY_DUE_II   (64 + 8)
 
#define FSM_WRITE_NEW_DATA   0
 
#define FSM_DONE   1
 
#define PortFsmType   uint8_t
 
#define PORTS_OPENED   0x1F
 
#define FSM_PROCESSING_WAIT_FOR_META   0
 
#define FSM_PROCESSING_PCKT_PROC   1
 
#define FSM_PROCESSING_STOP   2
 
#define FSM_PROCESSING_START   3
 
#define FSM_PROCESSING_BURST_READING   4
 
#define FSM_PROCESSING_DATAFLOW_WRITE   5
 
#define FSM_PROCESSING_DATAFLOW_READ   6
 
#define FSM_PROCESSING_OUTPUT   7
 
#define FSM_PROCESSING_OUTPUT_2   8
 
#define FSM_PROCESSING_OUTPUT_3   9
 
#define FSM_PROCESSING_OUTPUT_4   10
 
#define FSM_PROCESSING_OUTPUT_5   11
 
#define FSM_PROCESSING_CONTINUOUS_RUN   12
 
#define FSM_PROCESSING_WAIT_FOR_DDR_CONTROLLER_EMPTYNESS   13
 
#define ProcessingFsmType   uint8_t
 
#define RO   0
 
#define NO   1
 
#define FILTER_SIZE_3   1
 
#define FILTER_SIZE_5   0
 
#define FILTER_SIZE_7   0
 
#define GRAY   1
 
#define RGBA   0
 
#define INPUT_PTR_WIDTH   256
 
#define OUTPUT_PTR_WIDTH   256
 
#define XF_USE_URAM   false
 

Typedefs

typedef uint8_t mat_elmt_t
 
typedef ap_uint< 512 > membus_512_t
 
typedef membus_512_t membus_t
 

Enumerations

enum  EchoCtrl {
  ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 , ECHO_OFF = 2 , ECHO_PATH_THRU = 0 ,
  ECHO_STORE_FWD = 1 , ECHO_OFF = 2 , ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 ,
  ECHO_OFF = 2 , ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 , ECHO_OFF = 2 ,
  ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 , ECHO_OFF = 2 , ECHO_PATH_THRU = 0 ,
  ECHO_STORE_FWD = 1 , ECHO_OFF = 2 , ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 ,
  ECHO_OFF = 2 , ECHO_STORE_FWD = 0 , ECHO_PATH_THRU = 1 , ECHO_CTRL_DISABLED = 0 ,
  ECHO_PATH_THRU = 1 , ECHO_STORE_FWD = 2 , ECHO_OFF = 3
}
 

Functions

void sobel (ap_uint< 32 > *pi_rank, ap_uint< 32 > *pi_size, stream< NetworkWord > &siSHL_This_Data, stream< NetworkWord > &soTHIS_Shl_Data, stream< NetworkMetaStream > &siNrc_meta, stream< NetworkMetaStream > &soNrc_meta, ap_uint< 32 > *po_rx_ports, stream< DmCmd > &soMemWrCmdP0, stream< DmSts > &siMemWrStsP0, stream< Axis< 512 > > &soMemWriteP0, membus_t *lcl_mem0, membus_t *lcl_mem1)
 Main process of the Sobel Application directives. More...
 
template<typename Tin , typename Tout , unsigned int arraysize>
void pMyMemtestMemCpy (Tin *in, Tout *out)
 Copy a fixed compile time amount of data to another array. More...
 
template<typename Tin , typename Tout , const unsigned int arraysize>
void pMemCpyCircularBuff (Tin *buff, Tout *out_mem, unsigned int elems, unsigned int offset_buff)
 Copy a run-time variable amount of data to another array employing the src as circular buffer i.e., handling overflow. More...
 
template<typename Tin , typename Tout , const unsigned int burstsize>
void pReadAxiMemMapped2HlsStream (Tin *main_mem, hls::stream< Tout > &sOut, unsigned int elems)
 Copy a run-time variable amount of data to an hls stream with a given max. More...
 
template<typename Tin , typename Tout , const unsigned int burstsize, typename Tcntr >
void pReadAxiMemMapped2HlsStreamCountFirst (Tin *main_mem, hls::stream< Tout > &sOut, unsigned int elems, hls::stream< Tcntr > &cmd)
 Copy a run-time variable amount of data to an hls stream with a given max it assumes also the initialization of a perf counter of "perfCounterMultipleCounts" function. More...
 
template<typename Tin , typename Tout , const unsigned int burstsize, typename Tcntr >
void pReadAxiMemMapped2HlsStreamCountActivated (Tin *main_mem, hls::stream< Tout > &sOut, unsigned int elems, hls::stream< Tcntr > &cmd)
 Copy a run-time variable amount of data to an hls stream with a given max it assumes "perfCounterMultipleCounts" function already initialized so it just incr. More...
 
template<typename Tin , const unsigned int loop_cnt, const unsigned int bytes_per_loop, const unsigned int max_data_transfer>
void storeWordToAxiStream (NetworkWord word, Tin &img_in_axi_stream, unsigned int *processed_word_rx, unsigned int *processed_bytes_rx, stream< bool > &sImageLoaded)
 Store a net word to a local AXI stream. More...
 
template<typename TInImg , const unsigned int img_pckts>
void storeWordToArray (uint64_t input, TInImg img[img_pckts], unsigned int *processed_word, unsigned int *image_loaded)
 Store a net word to local memory. More...
 
template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterProc (hls::stream< Tin > &cmd, hls::stream< Tout > &out, int direction, int burst_length, int nmbr_outstanding)
 
template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterProc2Mem (hls::stream< Tin > &cmd, Tout *out, int direction, int burst_length, int nmbr_outstanding)
 
template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterProc2MemCountOnly (hls::stream< Tin > &cmd, Tout *out)
 Count Clock Cycles between two events, the first event init the counter the second stop the count. More...
 
template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterProc2MemCountIncremental (hls::stream< Tin > &cmd, Tout *out)
 Count Clock Cycles between two events, the first event init the counter the second stop the count and increment the out register TODO: seems not working at the csim lvl (never tested below) when executing single DUT step, hanging stream values. More...
 
template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterMultipleCounts (hls::stream< Tin > &cmd, Tout *out)
 Count Clock Cycles between two events, the first event init the counter the second stop the count, a 0 after the init stop definitevely the counter. More...
 
template<typename Tevent = bool, const unsigned int counter_width = 32, const unsigned int maximum_counter_value_before_reset = 4000000>
void pCountClockCycles (hls::stream< Tevent > &sOfEnableCCIncrement, hls::stream< Tevent > &sOfResetCounter, hls::stream< Tevent > &sOfGetTheCounter, hls::stream< ap_uint< counter_width > > &oSClockCounter)
 Count Clock Cycles between two events first sketch TODO: make it working without counting with the stream or reshaping as FSM. More...
 
void pPortAndDestionation (ap_uint< 32 > *pi_rank, ap_uint< 32 > *pi_size, stream< NodeId > &sDstNode_sig, ap_uint< 32 > *po_rx_ports)
 pPortAndDestionation - Setup the port and the destination rank. More...
 
void pRXPath (stream< NetworkWord > &siSHL_This_Data, stream< NetworkMetaStream > &siNrc_meta, stream< NetworkMetaStream > &sRxtoTx_Meta, stream< ap_uint< INPUT_PTR_WIDTH >> &img_in_axi_stream, NetworkMetaStream meta_tmp, unsigned int *processed_word_rx, unsigned int *processed_bytes_rx, stream< bool > &sImageLoaded)
 Receive Path - From SHELL to THIS. FIXME: never checked, just substitute this one from DID. More...
 
template<typename TMemWrd , const unsigned int loop_cnt, const unsigned int cTransfers_Per_Chunk>
void pRXPathNetToStream (stream< NetworkWord > &siSHL_This_Data, stream< NetworkMetaStream > &siNrc_meta, stream< NetworkMetaStream > &sRxtoTx_Meta, stream< ap_uint< TMemWrd >> &img_in_axi_stream, stream< bool > &sMemBurstRx)
 Receive Path - From SHELL to THIS. Function for accumulating a memory word and write it Not ready for complete parametrization. More...
 
template<typename TMemWrd , const unsigned int loop_cnt, const unsigned int bytes_per_loop>
void pRXPathStreamToDDR (stream< ap_uint< TMemWrd >> &img_in_axi_stream, stream< bool > &sMemBurstRx, stream< DmCmd > &soMemWrCmdP0, stream< DmSts > &siMemWrStsP0, stream< Axis< TMemWrd > > &soMemWriteP0, stream< bool > &sImageLoaded)
 Receive Path - From RX path stream word aligned to store towards the DDR. More...
 
void pTXPath (stream< NetworkWord > &soTHIS_Shl_Data, stream< NetworkMetaStream > &soNrc_meta, stream< NetworkWord > &sProcpToTxp_Data, stream< NetworkMetaStream > &sRxtoTx_Meta, stream< NodeId > &sDstNode_sig, unsigned int *processed_word_tx, ap_uint< 32 > *pi_rank)
 Transmit Path - From THIS to SHELL. More...
 
template<const unsigned int counter_width = 64>
void pTHISProcessingData (stream< NetworkWord > &sRxpToProcp_Data, stream< NetworkWord > &sProcpToTxp_Data, stream< NetworkMetaStream > &sRxtoProc_Meta, stream< NetworkMetaStream > &sProctoTx_Meta, bool *start_stop)
 THIS processing the data once recieved a start command Template function for custom processing. More...
 
template<typename TimgIn = ap_uint<INPUT_PTR_WIDTH>, typename TimgOut = ap_uint<OUTPUT_PTR_WIDTH>>
void pProcPath (stream< NetworkWord > &sRxpToTxp_Data, stream< TimgIn > &img_in_axi_stream, stream< TimgOut > &img_out_axi_stream, stream< bool > &sImageLoaded)
 Processing Path - Main processing FSM for Vitis kernels. More...
 
void medianBlurAccelStream (hls::stream< ap_uint< 256 >> &img_in_axi_stream, hls::stream< ap_uint< 256 >> &img_out_axi_stream, int rows, int cols)
 Top-level accelerated function of the Sobel Application with array I/Fadd SOBEL. More...
 
void sobelAccelMem (membus_t *img_inp, membus_t *img_out1, membus_t *img_out2, int rows, int cols)
 Top-level accelerated function of the Sobel Application with memory mapped interfaces. More...
 

Variables

const unsigned long int max_counter_cc = 4000000
 

Detailed Description

This is a subgroup of Sobel accelerated function with only synthesizable (HLS) functions/classes.

Macro Definition Documentation

◆ BPERMDW_512

#define BPERMDW_512   (MEMDW_512/8)

Definition at line 109 of file sobel.hpp.

◆ BYTE_PER_MEM_WORD

#define BYTE_PER_MEM_WORD   BPERMDW_512

Definition at line 121 of file sobel.hpp.

◆ CHECK_CHUNK_SIZE

#define CHECK_CHUNK_SIZE   0x1000

This define configures tha AXI burst size of DDRM memory-mapped interfaces AXI4 allows 4KiB, but Role's AXI interconnect is configured at max 1KiB 0x40->64, 0x400->1024B(1KiB), 0x1000->4KiB.

Definition at line 120 of file sobel.hpp.

◆ CYCLES_UNTIL_TIMEOUT

#define CYCLES_UNTIL_TIMEOUT   0x0100

Definition at line 129 of file sobel.hpp.

◆ Data_t_in

#define Data_t_in   ap_axiu<INPUT_PTR_WIDTH, 0, 0, 0>

Definition at line 93 of file sobel.hpp.

◆ Data_t_out

#define Data_t_out   ap_axiu<OUTPUT_PTR_WIDTH, 0, 0, 0>

Definition at line 94 of file sobel.hpp.

◆ DDR_LATENCY

#define DDR_LATENCY   (52/4)

Definition at line 133 of file sobel.hpp.

◆ DEFAULT_RX_PORT

#define DEFAULT_RX_PORT   2718

Definition at line 91 of file sobel.hpp.

◆ DEFAULT_TX_PORT

#define DEFAULT_TX_PORT   2718

Definition at line 90 of file sobel.hpp.

◆ ENABLE_DDR

#define ENABLE_DDR

Definition at line 55 of file sobel.hpp.

◆ EXTRA_DDR_LATENCY_DUE_II

#define EXTRA_DDR_LATENCY_DUE_II   (64 + 8)

Definition at line 134 of file sobel.hpp.

◆ FILTER_SIZE_3

#define FILTER_SIZE_3   1

Definition at line 58 of file xf_config_params.h.

◆ FILTER_SIZE_5

#define FILTER_SIZE_5   0

Definition at line 59 of file xf_config_params.h.

◆ FILTER_SIZE_7

#define FILTER_SIZE_7   0

Definition at line 60 of file xf_config_params.h.

◆ FSM_CHK_PROC_BYTES

#define FSM_CHK_PROC_BYTES   11

Definition at line 79 of file sobel.hpp.

◆ FSM_CHK_SKIP

#define FSM_CHK_SKIP   10

Definition at line 78 of file sobel.hpp.

◆ FSM_CHK_WRT_CHNK_TO_DDR_PND

#define FSM_CHK_WRT_CHNK_TO_DDR_PND   12

Definition at line 80 of file sobel.hpp.

◆ FSM_DONE

#define FSM_DONE   1

Definition at line 56 of file sobel_network_library.hpp.

◆ FSM_IDLE

#define FSM_IDLE   9

Definition at line 77 of file sobel.hpp.

◆ FSM_PROCESSING_BURST_READING

#define FSM_PROCESSING_BURST_READING   4

Definition at line 42 of file sobel_processing.hpp.

◆ FSM_PROCESSING_CONTINUOUS_RUN

#define FSM_PROCESSING_CONTINUOUS_RUN   12

Definition at line 50 of file sobel_processing.hpp.

◆ FSM_PROCESSING_DATAFLOW_READ

#define FSM_PROCESSING_DATAFLOW_READ   6

Definition at line 44 of file sobel_processing.hpp.

◆ FSM_PROCESSING_DATAFLOW_WRITE

#define FSM_PROCESSING_DATAFLOW_WRITE   5

Definition at line 43 of file sobel_processing.hpp.

◆ FSM_PROCESSING_OUTPUT

#define FSM_PROCESSING_OUTPUT   7

Definition at line 45 of file sobel_processing.hpp.

◆ FSM_PROCESSING_OUTPUT_2

#define FSM_PROCESSING_OUTPUT_2   8

Definition at line 46 of file sobel_processing.hpp.

◆ FSM_PROCESSING_OUTPUT_3

#define FSM_PROCESSING_OUTPUT_3   9

Definition at line 47 of file sobel_processing.hpp.

◆ FSM_PROCESSING_OUTPUT_4

#define FSM_PROCESSING_OUTPUT_4   10

Definition at line 48 of file sobel_processing.hpp.

◆ FSM_PROCESSING_OUTPUT_5

#define FSM_PROCESSING_OUTPUT_5   11

Definition at line 49 of file sobel_processing.hpp.

◆ FSM_PROCESSING_PCKT_PROC

#define FSM_PROCESSING_PCKT_PROC   1

Definition at line 39 of file sobel_processing.hpp.

◆ FSM_PROCESSING_START

#define FSM_PROCESSING_START   3

Definition at line 41 of file sobel_processing.hpp.

◆ FSM_PROCESSING_STOP

#define FSM_PROCESSING_STOP   2

Definition at line 40 of file sobel_processing.hpp.

◆ FSM_PROCESSING_WAIT_FOR_DDR_CONTROLLER_EMPTYNESS

#define FSM_PROCESSING_WAIT_FOR_DDR_CONTROLLER_EMPTYNESS   13

Definition at line 51 of file sobel_processing.hpp.

◆ FSM_PROCESSING_WAIT_FOR_META

#define FSM_PROCESSING_WAIT_FOR_META   0

Definition at line 38 of file sobel_processing.hpp.

◆ FSM_WR_PAT_CMD

#define FSM_WR_PAT_CMD   13

Definition at line 81 of file sobel.hpp.

◆ FSM_WR_PAT_DATA

#define FSM_WR_PAT_DATA   15

Definition at line 83 of file sobel.hpp.

◆ FSM_WR_PAT_LOAD

#define FSM_WR_PAT_LOAD   14

Definition at line 82 of file sobel.hpp.

◆ FSM_WR_PAT_STS_A

#define FSM_WR_PAT_STS_A   16

Definition at line 84 of file sobel.hpp.

◆ FSM_WR_PAT_STS_B

#define FSM_WR_PAT_STS_B   17

Definition at line 85 of file sobel.hpp.

◆ FSM_WR_PAT_STS_C

#define FSM_WR_PAT_STS_C   18

Definition at line 86 of file sobel.hpp.

◆ FSM_WRITE_NEW_DATA

#define FSM_WRITE_NEW_DATA   0

Definition at line 55 of file sobel_network_library.hpp.

◆ fsmStateDDRdef

#define fsmStateDDRdef   uint8_t

Definition at line 126 of file sobel.hpp.

◆ GRAY

#define GRAY   1

Definition at line 62 of file xf_config_params.h.

◆ INPUT_PTR_WIDTH

#define INPUT_PTR_WIDTH   256

Definition at line 65 of file xf_config_params.h.

◆ KWPERMDW_512

#define KWPERMDW_512   (BPERMDW_512/sizeof(TYPE))

Definition at line 110 of file sobel.hpp.

◆ LOAD_IN_STREAM

#define LOAD_IN_STREAM   3

Definition at line 71 of file sobel.hpp.

◆ MAX_NB_OF_ELMT_PERDW

#define MAX_NB_OF_ELMT_PERDW   (BPERDW/sizeof(mat_elmt_t))

Definition at line 101 of file sobel.hpp.

◆ MAX_NB_OF_ELMT_READ

#define MAX_NB_OF_ELMT_READ   16

Definition at line 97 of file sobel.hpp.

◆ MAX_NB_OF_WORDS_READ

#define MAX_NB_OF_WORDS_READ   (MAX_NB_OF_ELMT_READ*sizeof(mat_elmt_t)/BPERDW)

Definition at line 100 of file sobel.hpp.

◆ MEMDW_512

#define MEMDW_512   512

Definition at line 108 of file sobel.hpp.

◆ NO

#define NO   1

Definition at line 55 of file xf_config_params.h.

◆ OUTPUT_PTR_WIDTH

#define OUTPUT_PTR_WIDTH   256

Definition at line 66 of file xf_config_params.h.

◆ PacketFsmType

#define PacketFsmType   uint8_t

Definition at line 87 of file sobel.hpp.

◆ PortFsmType

#define PortFsmType   uint8_t

Definition at line 57 of file sobel_network_library.hpp.

◆ PORTS_OPENED

#define PORTS_OPENED   0x1F

Definition at line 61 of file sobel_network_library.hpp.

◆ PROCESSING_PACKET

#define PROCESSING_PACKET   2

Definition at line 70 of file sobel.hpp.

◆ ProcessingFsmType

#define ProcessingFsmType   uint8_t

Definition at line 52 of file sobel_processing.hpp.

◆ RGBA

#define RGBA   0

Definition at line 63 of file xf_config_params.h.

◆ RO

#define RO   0

Definition at line 54 of file xf_config_params.h.

◆ ROLE_IS_SOBEL

#define ROLE_IS_SOBEL

Definition at line 66 of file sobel.hpp.

◆ SOBEL_RETURN_RESULTS

#define SOBEL_RETURN_RESULTS   4

Definition at line 72 of file sobel.hpp.

◆ SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT

#define SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT   5

Definition at line 73 of file sobel.hpp.

◆ SOBEL_RETURN_RESULTS_FWD

#define SOBEL_RETURN_RESULTS_FWD   7

Definition at line 75 of file sobel.hpp.

◆ SOBEL_RETURN_RESULTS_UNPACK

#define SOBEL_RETURN_RESULTS_UNPACK   6

Definition at line 74 of file sobel.hpp.

◆ TOTMEMDW_512

#define TOTMEMDW_512   (1 + (IMGSIZE - 1) / BPERMDW_512)

Definition at line 113 of file sobel.hpp.

◆ TRANSFERS_PER_CHUNK

#define TRANSFERS_PER_CHUNK   (CHECK_CHUNK_SIZE/BYTE_PER_MEM_WORD)

Definition at line 122 of file sobel.hpp.

◆ TRANSFERS_PER_CHUNK_DIVEND

#define TRANSFERS_PER_CHUNK_DIVEND   (TOTMEMDW_512-(TOTMEMDW_512/TRANSFERS_PER_CHUNK)*TRANSFERS_PER_CHUNK)

Definition at line 123 of file sobel.hpp.

◆ TYPICAL_DDR_LATENCY

#define TYPICAL_DDR_LATENCY   4

Definition at line 130 of file sobel.hpp.

◆ WAIT_FOR_META

#define WAIT_FOR_META   0

Definition at line 68 of file sobel.hpp.

◆ WAIT_FOR_STREAM_PAIR

#define WAIT_FOR_STREAM_PAIR   1

Definition at line 69 of file sobel.hpp.

◆ WAIT_FOR_TX

#define WAIT_FOR_TX   8

Definition at line 76 of file sobel.hpp.

◆ XF_USE_URAM

#define XF_USE_URAM   false

Definition at line 68 of file xf_config_params.h.

Typedef Documentation

◆ mat_elmt_t

typedef uint8_t mat_elmt_t

Definition at line 98 of file sobel.hpp.

◆ membus_512_t

typedef ap_uint< 512 > membus_512_t

Definition at line 111 of file sobel.hpp.

◆ membus_t

typedef membus_512_t membus_t

Definition at line 112 of file sobel.hpp.

Enumeration Type Documentation

◆ EchoCtrl

enum EchoCtrl

SHELL/MMIO/EchoCtrl - Config Register

Enumerator
ECHO_PATH_THRU 
ECHO_STORE_FWD 
ECHO_OFF 
ECHO_PATH_THRU 
ECHO_STORE_FWD 
ECHO_OFF 
ECHO_PATH_THRU 
ECHO_STORE_FWD 
ECHO_OFF 
ECHO_PATH_THRU 
ECHO_STORE_FWD 
ECHO_OFF 
ECHO_PATH_THRU 
ECHO_STORE_FWD 
ECHO_OFF 
ECHO_PATH_THRU 
ECHO_STORE_FWD 
ECHO_OFF 
ECHO_PATH_THRU 
ECHO_STORE_FWD 
ECHO_OFF 
ECHO_STORE_FWD 
ECHO_PATH_THRU 
ECHO_CTRL_DISABLED 
ECHO_PATH_THRU 
ECHO_STORE_FWD 
ECHO_OFF 

Definition at line 60 of file sobel.hpp.

60  {
61  ECHO_PATH_THRU = 0,
62  ECHO_STORE_FWD = 1,
63  ECHO_OFF = 2
64 };
ECHO_STORE_FWD
@ ECHO_STORE_FWD
Definition: sobel.hpp:62
ECHO_OFF
@ ECHO_OFF
Definition: sobel.hpp:63
ECHO_PATH_THRU
@ ECHO_PATH_THRU
Definition: sobel.hpp:61

Function Documentation

◆ medianBlurAccelStream()

void medianBlurAccelStream ( hls::stream< ap_uint< 256 >> &  img_in_axi_stream,
hls::stream< ap_uint< 256 >> &  img_out_axi_stream,
int  rows,
int  cols 
)

Top-level accelerated function of the Sobel Application with array I/Fadd SOBEL.

Returns
Nothing.

Definition at line 71 of file xf_sobel_accel.cpp.

74  {
75  // clang-format on
76  #pragma HLS INLINE off
77 
78  xf::cv::Mat<TYPE, HEIGHT, WIDTH, NPIX> imgInput(rows, cols);
79  // clang-format off
80  #pragma HLS stream variable=imgInput.data depth=2
81  // clang-format on
82 
83  xf::cv::Mat<TYPE, HEIGHT, WIDTH, NPIX> imgOutput(rows, cols);
84  // clang-format off
85  #pragma HLS stream variable=imgOutput.data depth=2
86  // clang-format on
87 
88  // clang-format off
89  #pragma HLS DATAFLOW
90  // clang-format on
91 
92  accel_utils accel_utils_obj;
93 
94  int dstMat_cols_align_npc = ((imgInput.cols + (NPIX - 1)) >> XF_BITSHIFT(NPIX)) << XF_BITSHIFT(NPIX);
95 
96  accel_utils_obj.hlsStrm2xfMat<INPUT_PTR_WIDTH, TYPE, HEIGHT, WIDTH, NPIX, (HEIGHT * WIDTH) / NPIX>(img_in_axi_stream, imgInput, dstMat_cols_align_npc);
97 
98  xf::cv::medianBlur<WINDOW_SIZE, XF_BORDER_REPLICATE, TYPE, HEIGHT, WIDTH, NPC1>(imgInput, imgOutput);
99 
100  int srcMat_cols_align_npc = ((imgOutput.cols + (NPIX - 1)) >> XF_BITSHIFT(NPIX)) << XF_BITSHIFT(NPIX);
101 
102  accel_utils_obj.xfMat2hlsStrm<OUTPUT_PTR_WIDTH, TYPE, HEIGHT, WIDTH, NPIX, HEIGHT*((WIDTH + NPIX - 1) / NPIX)>(imgOutput, img_out_axi_stream,
103  srcMat_cols_align_npc);
104 }
WIDTH
#define WIDTH
Definition: xf_gammacorrection_config.h:64
NPIX
#define NPIX
Definition: xf_gammacorrection_config.h:61
HEIGHT
#define HEIGHT
Definition: xf_gammacorrection_config.h:65
INPUT_PTR_WIDTH
#define INPUT_PTR_WIDTH
Definition: mceuropeanengine.hpp:71
OUTPUT_PTR_WIDTH
#define OUTPUT_PTR_WIDTH
Definition: mceuropeanengine.hpp:75
TYPE
#define TYPE
Definition: xf_median_blur_config.h:89
test_harris_standalone.rows
rows
Definition: test_harris_standalone.py:167
test_harris_standalone.cols
cols
Definition: test_harris_standalone.py:167

◆ pCountClockCycles()

template<typename Tevent = bool, const unsigned int counter_width = 32, const unsigned int maximum_counter_value_before_reset = 4000000>
void pCountClockCycles ( hls::stream< Tevent > &  sOfEnableCCIncrement,
hls::stream< Tevent > &  sOfResetCounter,
hls::stream< Tevent > &  sOfGetTheCounter,
hls::stream< ap_uint< counter_width > > &  oSClockCounter 
)

Count Clock Cycles between two events first sketch TODO: make it working without counting with the stream or reshaping as FSM.

Parameters
[in]sOfEnableCCIncrement
[in]sOfResetCounter
[in]sOfGetTheCounter
[in]oSClockCounter
[in]Teventthe event datatype
[in]counter_widththe counter precision
[in]maximum_counter_value_before_resetthe maxmimum amount of cc count before auto reset
Returns
Nothing.

Definition at line 486 of file sobel_hw_common.hpp.

491 {
492 
493  static ap_uint<counter_width> internal_counter = 0;
494  static bool pop_the_counter = false;
495 #pragma HLS reset variable=internal_counter
496 #pragma HLS reset variable=pop_the_counter
497 //giving priority to the pop
498  if(!sOfGetTheCounter.empty()){
499  pop_the_counter = sOfGetTheCounter.read();
500  }
501  if (pop_the_counter && !oSClockCounter.full())
502  {
503  oSClockCounter.write(internal_counter);
504  pop_the_counter=false;
505  }
506  if(!sOfResetCounter.empty()){
507  bool reset_or_not = sOfResetCounter.read();
508  if (reset_or_not)
509  {
510  internal_counter = 0;
511  }
512  }
513  if(!sOfEnableCCIncrement.empty()){
514  bool increment = sOfEnableCCIncrement.read();
515  if (increment)
516  {
517  if(internal_counter==maximum_counter_value_before_reset){
518  internal_counter=1;
519  }else{
520  internal_counter++;
521  }
522 #if DEBUG_LEVEL == TRACE_ALL
523 #ifndef __SYNTHESIS__
524  printf("DEBUG pCountClockCycles counter value = %s\n", internal_counter.to_string().c_str());
525 #endif //__SYNTHESIS__
526 #endif
527  }
528  }
529 }

◆ perfCounterMultipleCounts()

template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterMultipleCounts ( hls::stream< Tin > &  cmd,
Tout *  out 
)

Count Clock Cycles between two events, the first event init the counter the second stop the count, a 0 after the init stop definitevely the counter.

Parameters
[in]cmdthe performance counter cmd stream, first is init second stop(0)/continue(everything else)
[out]outthe output register of where store the incremental counter value
[in]Tinthe input datatype
[in]Toutthe output datatype
[in]counter_precisionthe maxmimum amount of data
Returns
Nothing.

Definition at line 439 of file sobel_hw_common.hpp.

439  {
440  #pragma HLS interface ap_ctrl_none port=return
441  Tin input_cmd=1;
442 
443  // wait to receive a value to start counting
444  ap_uint<counter_precision> cnt = cmd.read();
445  reset:
446  while (input_cmd != 0)//a zero will stop the counter
447  {
448 #pragma HLS LOOP_TRIPCOUNT min = 1 max = max_counter_cc
449 #if DEBUG_LEVEL == TRACE_ALL
450  #ifndef __SYNTHESIS__
451  //printf("DEBUG begin to count :D input_cmd value = %s\n", input_cmd.to_string().c_str());
452 #endif //__SYNTHESIS__
453 #endif
454 // keep counting until a value is available
455 count:
456  while (cmd.read_nb(input_cmd) == false) {
457 #pragma HLS LOOP_TRIPCOUNT min = 1 max = max_counter_cc
458 #pragma HLS PIPELINE II=1
459  cnt++;
460 #if DEBUG_LEVEL == TRACE_ALL
461  #ifndef __SYNTHESIS__
462  // printf("DEBUG perfCounterProc counter value = %s\n", cnt.to_string().c_str());
463 #endif //__SYNTHESIS__
464 #endif
465  }
466  input_cmd=cmd.read();
467  }
468  *out +=cnt;
469 }
tc_TcpEcho.count
count
Definition: tc_TcpEcho.py:449
test.out
out
Definition: test.py:12

◆ perfCounterProc()

template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterProc ( hls::stream< Tin > &  cmd,
hls::stream< Tout > &  out,
int  direction,
int  burst_length,
int  nmbr_outstanding 
)

Definition at line 302 of file sobel_hw_common.hpp.

303 {
304 #pragma HLS INLINE off
305 
306  Tin input_cmd;
307  // wait to receive a value to start counting
308  ap_uint<counter_precision> cnt = cmd.read();
309 // keep counting until a value is available
310 count:
311  while (cmd.read_nb(input_cmd) == false) {
312  cnt++;
313  #if DEBUG_LEVEL == TRACE_ALL
314 #ifndef __SYNTHESIS__
315  printf("DEBUG perfCounterProc counter value = %s\n", cnt.to_string().c_str());
316 #endif //__SYNTHESIS__
317 #endif
318  }
319 
320  // // write out kernel statistics to global memory
321  Tout tmp[1];//was 4
322  tmp[0] = cnt;
323  // tmp[1] = input_cmd;
324  //tmp[1] = burst_length;
325  // tmp[3] = nmbr_outstanding;
326  //memcpy(out, tmp, 4 * sizeof(Tout));
327  out.write(tmp[0]);
328  //out.write(tmp[1]);
329  //out.write(nmbr_outstanding); this
330  //out.write(input_cmd); Xilinx use this to count the errors but we are already counting so...
331 }
test_harris_standalone.tmp
tmp
Definition: test_harris_standalone.py:101

◆ perfCounterProc2Mem()

template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterProc2Mem ( hls::stream< Tin > &  cmd,
Tout *  out,
int  direction,
int  burst_length,
int  nmbr_outstanding 
)

Definition at line 337 of file sobel_hw_common.hpp.

337  {
338 
339  Tin input_cmd;
340  // wait to receive a value to start counting
341  ap_uint<counter_precision> cnt = cmd.read();
342 // keep counting until a value is available
343 count:
344  while (cmd.read_nb(input_cmd) == false) {
345 #pragma HLS LOOP_TRIPCOUNT min = 1 max = max_counter_cc
346  cnt++;
347 
348 #if DEBUG_LEVEL == TRACE_ALL
349 #ifndef __SYNTHESIS__
350  printf("DEBUG perfCounterProc counter value = %s\n", cnt.to_string().c_str());
351 #endif //__SYNTHESIS__
352 #endif
353  }
354  *out =cnt;
355 }

◆ perfCounterProc2MemCountIncremental()

template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterProc2MemCountIncremental ( hls::stream< Tin > &  cmd,
Tout *  out 
)

Count Clock Cycles between two events, the first event init the counter the second stop the count and increment the out register TODO: seems not working at the csim lvl (never tested below) when executing single DUT step, hanging stream values.

Parameters
[in]cmdthe performance counter cmd stream, first is init second stop
[out]outthe output register of where increment the counter value
[in]Tinthe input datatype
[in]Toutthe output datatype
[in]counter_precisionthe maxmimum amount of data
Returns
Nothing.

Definition at line 407 of file sobel_hw_common.hpp.

407  {
408 
409  Tin input_cmd;
410  // wait to receive a value to start counting
411  ap_uint<counter_precision> cnt = cmd.read();
412 // keep counting until a value is available
413 count:
414  while (cmd.read_nb(input_cmd) == false) {
415 #pragma HLS LOOP_TRIPCOUNT min = 1 max = max_counter_cc
416  cnt++;
417 #if DEBUG_LEVEL == TRACE_ALL
418 #ifndef __SYNTHESIS__
419  printf("DEBUG perfCounterProc counter value = %s\n", cnt.to_string().c_str());
420 #endif //__SYNTHESIS__
421 #endif
422  }
423  *out +=cnt;
424 }

◆ perfCounterProc2MemCountOnly()

template<typename Tin , typename Tout , unsigned int counter_precision = 64>
void perfCounterProc2MemCountOnly ( hls::stream< Tin > &  cmd,
Tout *  out 
)

Count Clock Cycles between two events, the first event init the counter the second stop the count.

Parameters
[in]cmdthe performance counter cmd stream, first is init second stop
[out]outthe output register of where store the counter value
[in]Tinthe input datatype
[in]Toutthe output datatype
[in]counter_precisionthe maxmimum amount of data
Returns
Nothing.

Definition at line 371 of file sobel_hw_common.hpp.

371  {
372 
373  Tin input_cmd;
374  // wait to receive a value to start counting
375  ap_uint<counter_precision> cnt = cmd.read();
376 // keep counting until a value is available
377 count:
378  while (cmd.read_nb(input_cmd) == false) {
379 #pragma HLS LOOP_TRIPCOUNT min = 1 max = max_counter_cc
380  cnt++;
381 
382 #if DEBUG_LEVEL == TRACE_ALL
383 #ifndef __SYNTHESIS__
384  printf("DEBUG perfCounterProc counter value = %s\n", cnt.to_string().c_str());
385 #endif //__SYNTHESIS__
386 #endif
387  }
388  *out =cnt;
389 }

◆ pMemCpyCircularBuff()

template<typename Tin , typename Tout , const unsigned int arraysize>
void pMemCpyCircularBuff ( Tin *  buff,
Tout *  out_mem,
unsigned int  elems,
unsigned int  offset_buff 
)

Copy a run-time variable amount of data to another array employing the src as circular buffer i.e., handling overflow.

Parameters
[out]out_memthe dst ptr
[in]buffthe src ptr, or the circular buffer
[in]elemsthe current amount of data to tx
[in]offset_buffthe initial offest in the circular buffer
[in]Tinthe input datatype
[in]Toutthe output datatype
[in]arraysizethe maxmimum amount of data
Returns
Nothing.

Definition at line 108 of file sobel_hw_common.hpp.

108  {
109 #pragma HLS INLINE
110  unsigned int j = 0;
111  circ_buff_loop: for (unsigned int i = 0; i < elems; i++)
112  {
113 #pragma HLS PIPELINE II=1
114 #pragma HLS LOOP_TRIPCOUNT min = 1 max = arraysize
115  if(offset_buff+j==arraysize)//
116  {
117  offset_buff=0;
118  j=1;
119  out_mem[i] = buff[0];
120  }else{
121  out_mem[i] = buff[offset_buff+j];
122  j++;
123  }
124  }
125 
126 }

◆ pMyMemtestMemCpy()

template<typename Tin , typename Tout , unsigned int arraysize>
void pMyMemtestMemCpy ( Tin *  in,
Tout *  out 
)

Copy a fixed compile time amount of data to another array.

Parameters
[out]outthe dst ptr
[in]inthe src ptr
[in]Tinthe input datatype
[in]Toutthe output datatype
[in]arraysizethe fixed amount of data
Returns
Nothing.

Definition at line 83 of file sobel_hw_common.hpp.

83  {
84 #pragma HLS INLINE
85  for (unsigned int i = 0; i < arraysize; i++)
86  {
87 #pragma HLS PIPELINE II=1
88  *out = *in;
89  }
90 
91 }

◆ pPortAndDestionation()

void pPortAndDestionation ( ap_uint< 32 > *  pi_rank,
ap_uint< 32 > *  pi_size,
stream< NodeId > &  sDstNode_sig,
ap_uint< 32 > *  po_rx_ports 
)

pPortAndDestionation - Setup the port and the destination rank.

Parameters
[in]pi_rank
[in]pi_size
[out]sDstNode_sig
[out]po_rx_ports
Returns
Nothing.

Definition at line 86 of file sobel_network_library.hpp.

92 {
93  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
94 #pragma HLS INLINE off
95  //-- STATIC VARIABLES (with RESET) ------------------------------------------
96  static PortFsmType port_fsm = FSM_WRITE_NEW_DATA;
97 #pragma HLS reset variable=port_fsm
98 
99  switch(port_fsm)
100  {
101  default:
102  case FSM_WRITE_NEW_DATA:
103  printf("DEBUG in pPortAndDestionation: port_fsm - FSM_WRITE_NEW_DATA\n");
104  //Sobel app needs to be reset to process new rank
105  if(!sDstNode_sig.full())
106  {
107  NodeId dst_rank = (*pi_rank + 1) % *pi_size;
108  #if DEBUG_LEVEL == TRACE_ALL
109  printf("rank: %d; size: %d; \n", (int) *pi_rank, (int) *pi_size);
110  #endif
111  sDstNode_sig.write(dst_rank);
112  *po_rx_ports = 0x0; //init the value
113  port_fsm = FSM_DONE;
114  }
115  break;
116  case FSM_DONE:
117  printf("DEBUG in pPortAndDestionation: port_fsm - FSM_DONE\n");
118  *po_rx_ports = PORTS_OPENED;
119  break;
120  }
121 
122 }
FSM_WRITE_NEW_DATA
#define FSM_WRITE_NEW_DATA
Definition: sobel_network_library.hpp:55
FSM_DONE
#define FSM_DONE
Definition: sobel_network_library.hpp:56
PortFsmType
#define PortFsmType
Definition: sobel_network_library.hpp:57
PORTS_OPENED
#define PORTS_OPENED
Definition: sobel_network_library.hpp:61
NodeId
ap_uint< 8 > NodeId
Definition: network.hpp:82

◆ pProcPath()

template<typename TimgIn = ap_uint<INPUT_PTR_WIDTH>, typename TimgOut = ap_uint<OUTPUT_PTR_WIDTH>>
void pProcPath ( stream< NetworkWord > &  sRxpToTxp_Data,
stream< TimgIn > &  img_in_axi_stream,
stream< TimgOut > &  img_out_axi_stream,
stream< bool > &  sImageLoaded 
)

Processing Path - Main processing FSM for Vitis kernels.

Parameters
[out]sRxpToTxp_Data
[in]img_in_axi_stream
[in]img_out_axi_stream
[out]processed_word_rx
[in]sImageLoaded
Returns
Nothing.

Definition at line 451 of file sobel_processing.hpp.

463 {
464  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
465  #pragma HLS INLINE off
466  #pragma HLS pipeline II=1
467 
468  //-- LOCAL VARIABLES ------------------------------------------------------
469  NetworkWord newWord;
470  uint16_t Thresh = 442;
471  float K = 0.04;
472  uint16_t k = K * (1 << 16); // Convert to Q0.16 format
473  static bool accel_called;
474  static unsigned int processed_word_proc;
475  static unsigned int timeoutCntAbs;
476  static unsigned int cnt_i;
477  static membus_t tmp;
478  TimgOut raw64;
479  Data_t_out temp;
480  #ifdef ENABLE_DDR
481  //static stream<ap_uint<OUTPUT_PTR_WIDTH>> img_out_axi_stream ("img_out_axi_stream");
482  //#pragma HLS stream variable=img_out_axi_stream depth=9
483  static unsigned int ddr_addr_out;
484  #pragma HLS reset variable=ddr_addr_out
485  #endif
486  static PacketFsmType SobelFSM = WAIT_FOR_META;
487  #pragma HLS reset variable=SobelFSM
488 
489  #pragma HLS reset variable=accel_called
490  #pragma HLS reset variable=processed_word_proc
491  #pragma HLS reset variable=timeoutCntAbs
492  #pragma HLS reset variable=cnt_i
493  #pragma HLS reset variable=tmp
494  #pragma HLS reset variable=raw64
495  #pragma HLS reset variable=temp
496 
497  switch(SobelFSM)
498  {
499  case WAIT_FOR_META:
500  printf("DEBUG in pProcPath: WAIT_FOR_META\n");
501  if (!sImageLoaded.empty())
502  {
503  if (sImageLoaded.read() == true) {
504  SobelFSM = PROCESSING_PACKET;
505  accel_called = false;
506  processed_word_proc = 0;
507  #ifdef ENABLE_DDR
508  ddr_addr_out = 0;
509  timeoutCntAbs = 0;
510  cnt_i = 0;
511  #endif
512  }
513  }
514  break;
515 
516  case PROCESSING_PACKET:
517  printf("DEBUG in pProcPath: PROCESSING_PACKET\n");
518  #ifndef ENABLE_DDR
519  if ( !img_in_axi_stream.empty() && !img_out_axi_stream.full() )
520  {
521  #endif
522  if (accel_called == false) {
523  #ifdef ENABLE_DDR
524  medianBlurAccelMem(lcl_mem0, lcl_mem1, WIDTH, HEIGHT);
525  #else // ! ENABLE_DDR
526  #ifdef FAKE_Sobel
527  fakeSobelAccelStream(img_in_axi_stream, img_out_axi_stream, MIN_RX_LOOPS, MIN_TX_LOOPS);
528  #else // !FAKE_Sobel
529  medianBlurAccelStream(img_in_axi_stream, img_out_axi_stream, WIDTH, HEIGHT);
530  #endif // FAKE_Sobel
531  #endif // ENABLE_DDR
532  accel_called = true;
533  SobelFSM = SOBEL_RETURN_RESULTS;
534  }
535  #ifndef ENABLE_DDR
536  }
537  #endif
538  break;
539 
540  #ifdef ENABLE_DDR
541  case SOBEL_RETURN_RESULTS:
542  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS, ddr_addr_out=%u\n", ddr_addr_out);
543  if (accel_called == true) {
544 
545  printf("DEBUG in pProcPath: Accumulated %u net words (%u B) to complete a single DDR word\n",
546  KWPERMDW_512, BPERMDW_512);
547  tmp = lcl_mem1[ddr_addr_out];
548  ddr_addr_out++;
549  SobelFSM = SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT;
550  timeoutCntAbs = 0;
551  }
552  break;
553 
554  case SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT:
555  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT [%u out of %u]\n", timeoutCntAbs, DDR_LATENCY);
556  if (timeoutCntAbs++ == DDR_LATENCY) {
557  SobelFSM = SOBEL_RETURN_RESULTS_FWD; //SOBEL_RETURN_RESULTS_UNPACK;
558  cnt_i = 0;
559  }
560  break;
561  /*
562  case SOBEL_RETURN_RESULTS_UNPACK:
563  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS_UNPACK, cnt_i=%u\n", cnt_i);
564  //for (unsigned int cnt_i=0; cnt_i<(MEMDW_512/OUTPUT_PTR_WIDTH); cnt_i++) {
565  #if OUTPUT_PTR_WIDTH == 64
566  raw64(0 ,63) = tmp(cnt_i*OUTPUT_PTR_WIDTH , cnt_i*OUTPUT_PTR_WIDTH+63);
567  #endif
568  if ( !img_out_axi_stream.full() ) {
569  img_out_axi_stream.write(raw64);
570  }
571  if (cnt_i == (MEMDW_512/OUTPUT_PTR_WIDTH) - 1) {
572  SobelFSM = SOBEL_RETURN_RESULTS_FWD;
573  }
574  cnt_i++;
575  //}
576  break;
577  */
578  case SOBEL_RETURN_RESULTS_FWD:
579  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS_FWD\n");
580  //if ( !img_out_axi_stream.empty() && !sRxpToTxp_Data.full() ) {
581  if ( (cnt_i <= (MEMDW_512/OUTPUT_PTR_WIDTH) - 1) && !sRxpToTxp_Data.full() ) {
582 
583  //temp.data = img_out_axi_stream.read();
584  temp.data(0 ,63) = tmp(cnt_i*OUTPUT_PTR_WIDTH , cnt_i*OUTPUT_PTR_WIDTH+63);
585  if (processed_word_proc++ == MIN_TX_LOOPS-1) {
586  temp.last = 1;
587  SobelFSM = WAIT_FOR_META;
588  }
589  else {
590  temp.last = 0;
591  }
592  //TODO: find why Vitis kernel does not set keep and last by itself
593  temp.keep = 255;
594  newWord = NetworkWord(temp.data, temp.keep, temp.last);
595  sRxpToTxp_Data.write(newWord);
596  cnt_i++;
597  }
598  else {
599  SobelFSM = SOBEL_RETURN_RESULTS;
600  }
601 
602  break;
603 
604  #else // ! ENABLE_DDR
605  case SOBEL_RETURN_RESULTS:
606  printf("DEBUG in pProcPath: SOBEL_RETURN_RESULTS\n");
607  if ( !img_out_axi_stream.empty() && !sRxpToTxp_Data.full() )
608  {
609 
610  temp.data = img_out_axi_stream.read();
611  if ( img_out_axi_stream.empty() )
612  //if (processed_word_proc++ == MIN_TX_LOOPS-1)
613  {
614  temp.last = 1;
615  SobelFSM = WAIT_FOR_META;
616  accel_called = false;
617  }
618  else
619  {
620  temp.last = 0;
621  }
622  //TODO: find why Vitis kernel does not set keep and last by itself
623  temp.keep = 255;
624  newWord = NetworkWord(temp.data, temp.keep, temp.last);
625  sRxpToTxp_Data.write(newWord);
626  }
627  break;
628  #endif // ENABLE_DDR
629  } // end switch
630 
631 }
BPERMDW_512
#define BPERMDW_512
Definition: harris.hpp:120
KWPERMDW_512
#define KWPERMDW_512
Definition: harris.hpp:121
MIN_TX_LOOPS
#define MIN_TX_LOOPS
Definition: mceuropeanengine.hpp:88
MIN_RX_LOOPS
#define MIN_RX_LOOPS
Definition: mceuropeanengine.hpp:87
medianBlurAccelMem
void medianBlurAccelMem(membus_t *img_inp, membus_t *img_out, int rows, int cols)
Top-level accelerated function of the MedianBlur Application with array I/F.
Definition: xf_median_blur_accel.cpp:222
medianBlurAccelStream
void medianBlurAccelStream(hls::stream< ap_uint< 8 >> &img_in_axi_stream, hls::stream< ap_uint< 64 >> &img_out_axi_stream, int rows, int cols)
Top-level accelerated function of the MedianBlur Application with array I/F.
Definition: xf_median_blur_accel.cpp:127
MEMDW_512
#define MEMDW_512
Definition: memtest.hpp:90
PacketFsmType
#define PacketFsmType
Definition: memtest.hpp:76
Data_t_out
#define Data_t_out
Definition: memtest.cpp:30
DDR_LATENCY
#define DDR_LATENCY
Definition: memtest.hpp:98
membus_t
membus_512_t membus_t
Definition: memtest.hpp:92
PROCESSING_PACKET
#define PROCESSING_PACKET
Definition: memtest.hpp:73
WAIT_FOR_META
#define WAIT_FOR_META
Definition: memtest.hpp:71
lcl_mem0
membus_t lcl_mem0[16384]
Definition: test_memtest.cpp:87
lcl_mem1
membus_t lcl_mem1[16384]
Definition: test_memtest.cpp:88
SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT
#define SOBEL_RETURN_RESULTS_ABSORB_DDR_LAT
Definition: sobel.hpp:73
SOBEL_RETURN_RESULTS
#define SOBEL_RETURN_RESULTS
Definition: sobel.hpp:72
SOBEL_RETURN_RESULTS_FWD
#define SOBEL_RETURN_RESULTS_FWD
Definition: sobel.hpp:75
fakeSobelAccelStream
void fakeSobelAccelStream(hls::stream< ap_axiu< 256, 0, 0, 0 > > &img_in_axi_stream, hls::stream< ap_axiu< 256, 0, 0, 0 > > &img_out_axi_stream, unsigned int min_rx_loops, unsigned int min_tx_loops)
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◆ pReadAxiMemMapped2HlsStream()

template<typename Tin , typename Tout , const unsigned int burstsize>
void pReadAxiMemMapped2HlsStream ( Tin *  main_mem,
hls::stream< Tout > &  sOut,
unsigned int  elems 
)

Copy a run-time variable amount of data to an hls stream with a given max.

Parameters
[out]main_memthe src ptr to read
[in]sOutthe dst hls stream
[in]elemsthe current amount of data to tx
[in]Tinthe input datatype
[in]Toutthe output datatype
[in]burstsizethe maxmimum amount of data
Returns
Nothing.

Definition at line 142 of file sobel_hw_common.hpp.

142  {
143 #pragma HLS INLINE
144  mmloop: for (unsigned int i = 0; i < elems; i++)
145  {
146 #pragma HLS PIPELINE II=1
147 #pragma HLS LOOP_TRIPCOUNT min = 1 max = burstsize
148  Tout tmp = main_mem[i];
149  sOut.write(tmp);
150  }
151 
152 }

◆ pReadAxiMemMapped2HlsStreamCountActivated()

template<typename Tin , typename Tout , const unsigned int burstsize, typename Tcntr >
void pReadAxiMemMapped2HlsStreamCountActivated ( Tin *  main_mem,
hls::stream< Tout > &  sOut,
unsigned int  elems,
hls::stream< Tcntr > &  cmd 
)

Copy a run-time variable amount of data to an hls stream with a given max it assumes "perfCounterMultipleCounts" function already initialized so it just incr.

Parameters
[out]main_memthe src ptr to read
[in]sOutthe dst hls stream
[in]elemsthe current amount of data to tx
[in]cmdthe performance counter cmd stream
[in]Tinthe input datatype
[in]Toutthe output datatype
[in]burstsizethe maxmimum amount of data
[in]Tcntrthe cmd perf counter datatype
Returns
Nothing.

Definition at line 201 of file sobel_hw_common.hpp.

201  {
202 #pragma HLS INLINE
203  cmd.write(1);
204  mmloop: for (unsigned int i = 0; i < elems; i++)
205  {
206 #pragma HLS PIPELINE II=1
207 #pragma HLS LOOP_TRIPCOUNT min = 1 max = burstsize
208  Tout tmp = main_mem[i];
209  sOut.write(tmp);
210  }
211  cmd.write(1);
212 }

◆ pReadAxiMemMapped2HlsStreamCountFirst()

template<typename Tin , typename Tout , const unsigned int burstsize, typename Tcntr >
void pReadAxiMemMapped2HlsStreamCountFirst ( Tin *  main_mem,
hls::stream< Tout > &  sOut,
unsigned int  elems,
hls::stream< Tcntr > &  cmd 
)

Copy a run-time variable amount of data to an hls stream with a given max it assumes also the initialization of a perf counter of "perfCounterMultipleCounts" function.

Parameters
[out]main_memthe src ptr to read
[in]sOutthe dst hls stream
[in]elemsthe current amount of data to tx
[in]cmdthe performance counter cmd stream
[in]Tinthe input datatype
[in]Toutthe output datatype
[in]burstsizethe maxmimum amount of data
[in]Tcntrthe cmd perf counter datatype
Returns
Nothing.

Definition at line 171 of file sobel_hw_common.hpp.

171  {
172 #pragma HLS INLINE
173 cmd.write(0);
174  mmloop: for (unsigned int i = 0; i < elems; i++)
175  {
176 #pragma HLS PIPELINE II=1
177 #pragma HLS LOOP_TRIPCOUNT min = 1 max = burstsize
178  Tout tmp = main_mem[i];
179  sOut.write(tmp);
180  }
181  cmd.write(1);
182 
183 }

◆ pRXPath()

void pRXPath ( stream< NetworkWord > &  siSHL_This_Data,
stream< NetworkMetaStream > &  siNrc_meta,
stream< NetworkMetaStream > &  sRxtoTx_Meta,
stream< ap_uint< INPUT_PTR_WIDTH >> &  img_in_axi_stream,
NetworkMetaStream  meta_tmp,
unsigned int *  processed_word_rx,
unsigned int *  processed_bytes_rx,
stream< bool > &  sImageLoaded 
)

Receive Path - From SHELL to THIS. FIXME: never checked, just substitute this one from DID.

Parameters
[in]siSHL_This_Data
[in]siNrc_meta
[out]sRxtoTx_Meta
[out]img_in_axi_stream
[out]meta_tmp
[out]processed_word
[out]sImageLoaded
Returns
Nothing.

Definition at line 139 of file sobel_network_library.hpp.

150 {
151  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
152  #pragma HLS INLINE off
153  #pragma HLS pipeline II=1
154 
155  //-- LOCAL VARIABLES ------------------------------------------------------
156  static NetworkWord netWord;
157  static PacketFsmType enqueueFSM = WAIT_FOR_META;
158  #pragma HLS reset variable=enqueueFSM
159 
160  switch(enqueueFSM)
161  {
162  case WAIT_FOR_META:
163  printf("DEBUG in pRXPath: enqueueFSM - WAIT_FOR_META, *processed_word_rx=%u, *processed_bytes_rx=%u\n",
164  *processed_word_rx, *processed_bytes_rx);
165  if ( !siNrc_meta.empty() && !sRxtoTx_Meta.full() )
166  {
167  meta_tmp = siNrc_meta.read();
168  meta_tmp.tlast = 1; //just to be sure...
169  sRxtoTx_Meta.write(meta_tmp);
170  enqueueFSM = PROCESSING_PACKET;
171  }
172  break;
173 
174  case PROCESSING_PACKET:
175  printf("DEBUG in pRXPath: enqueueFSM - PROCESSING_PACKET, *processed_word_rx=%u, *processed_bytes_rx=%u\n",
176  *processed_word_rx, *processed_bytes_rx);
177  if ( !siSHL_This_Data.empty() && !img_in_axi_stream.full())
178  {
179  //-- Read incoming data chunk
180  netWord = siSHL_This_Data.read();
181  storeWordToAxiStream(netWord, img_in_axi_stream, processed_word_rx, processed_bytes_rx,
182  sImageLoaded);
183  if(netWord.tlast == 1)
184  {
185  enqueueFSM = WAIT_FOR_META;
186  }
187  }
188  break;
189  }
190 }
storeWordToAxiStream
void storeWordToAxiStream(NetworkWord word, stream< ap_axiu< 64, 0, 0, 0 > > &img_in_axi_stream, unsigned int *processed_word_rx, unsigned int *image_loaded)
Store a word from ethernet to a local AXI stream.
Definition: gammacorrection.cpp:71
enqueueFSM
uint8_t enqueueFSM
Definition: uppercase.cpp:54
NetworkMetaStream::tlast
ap_uint< 1 > tlast
Definition: network.hpp:111
NetworkWord::tlast
ap_uint< 1 > tlast
Definition: network.hpp:51
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◆ pRXPathNetToStream()

template<typename TMemWrd , const unsigned int loop_cnt, const unsigned int cTransfers_Per_Chunk>
void pRXPathNetToStream ( stream< NetworkWord > &  siSHL_This_Data,
stream< NetworkMetaStream > &  siNrc_meta,
stream< NetworkMetaStream > &  sRxtoTx_Meta,
stream< ap_uint< TMemWrd >> &  img_in_axi_stream,
stream< bool > &  sMemBurstRx 
)

Receive Path - From SHELL to THIS. Function for accumulating a memory word and write it Not ready for complete parametrization.

Parameters
[in]siSHL_This_Datathe data rx from network
[in]siNrc_metameta from network
[out]sRxtoTx_Metameta to the tx path
[out]img_in_axi_streamthe image data packed in 512 bits
[out]sMemBurstRxassessing the burst is ready
Returns
Nothing.

Definition at line 206 of file sobel_network_library.hpp.

213 {
214  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
215  #pragma HLS INLINE off
216 
217  //-- LOCAL VARIABLES ------------------------------------------------------
218  static NetworkWord netWord;
219  // const unsigned int loop_cnt = (MEMDW_512/BITS_PER_10GBITETHRNET_AXI_PACKET);
220  NetworkMetaStream meta_tmp;
221  static ap_uint<TMemWrd> v = 0;
222  static unsigned int cnt_wr_stream = 0, cnt_wr_burst = 0;
223  #pragma HLS reset variable=cnt_wr_stream
224  #pragma HLS reset variable=cnt_wr_burst
225  static PacketFsmType enqueueRxToStrFSM = WAIT_FOR_META;
226  #pragma HLS reset variable=enqueueRxToStrFSM
227 
228  switch(enqueueRxToStrFSM)
229  {
230  case WAIT_FOR_META:
231  printf("DEBUG in pRXPathNetToStream: enqueueRxToStrFSM - WAIT_FOR_META\n");
232 
233  if ( !siNrc_meta.empty() && !sRxtoTx_Meta.full() )
234  {
235  meta_tmp = siNrc_meta.read();
236  meta_tmp.tlast = 1; //just to be sure...
237  sRxtoTx_Meta.write(meta_tmp);
238  enqueueRxToStrFSM = PROCESSING_PACKET;
239  }
240  break;
241 
242  case PROCESSING_PACKET:
243  printf("DEBUG in pRXPathNetToStream: enqueueRxToStrFSM - PROCESSING_PACKET\n");
244  if ( !siSHL_This_Data.empty() && !img_in_axi_stream.full())
245  {
246  //-- Read incoming data chunk
247  netWord = siSHL_This_Data.read();
248  printf("DEBUG in pRXPathNetToStream: Data write = {D=0x%16.16llX, K=0x%2.2X, L=%d} \n",
249  netWord.tdata.to_long(), netWord.tkeep.to_int(), netWord.tlast.to_int());
250  if ((netWord.tkeep >> cnt_wr_stream) == 0) {
251  printf("WARNING: value with tkeep=0 at cnt_wr_stream=%u\n", cnt_wr_stream);
252  }
253  v(cnt_wr_stream*64, (cnt_wr_stream+1)*64-1) = netWord.tdata(0,63);
254  if ((cnt_wr_stream++ == loop_cnt-1) || (netWord.tlast == 1)) {
255  std::cout << "DEBUG in pRXPathNetToStream: Pushing to img_in_axi_stream :" << std::hex << v << std::endl;
256  img_in_axi_stream.write(v);
257  if ((cnt_wr_burst++ == cTransfers_Per_Chunk-1) || (netWord.tlast == 1)) {
258  if (!sMemBurstRx.full()) {
259  sMemBurstRx.write(true);
260  }
261  cnt_wr_burst = 0;
262  }
263  if (netWord.tlast == 1) {
264  enqueueRxToStrFSM = WAIT_FOR_META;
265  }
266  cnt_wr_stream = 0;
267  }
268  }
269  break;
270  }
271 }
enqueueRxToStrFSM
uint8_t enqueueRxToStrFSM
Definition: median_blur.cpp:49
NetworkWord::tdata
ap_uint< 64 > tdata
Definition: network.hpp:49
NetworkWord::tkeep
ap_uint< 8 > tkeep
Definition: network.hpp:50

◆ pRXPathStreamToDDR()

template<typename TMemWrd , const unsigned int loop_cnt, const unsigned int bytes_per_loop>
void pRXPathStreamToDDR ( stream< ap_uint< TMemWrd >> &  img_in_axi_stream,
stream< bool > &  sMemBurstRx,
stream< DmCmd > &  soMemWrCmdP0,
stream< DmSts > &  siMemWrStsP0,
stream< Axis< TMemWrd > > &  soMemWriteP0,
stream< bool > &  sImageLoaded 
)

Receive Path - From RX path stream word aligned to store towards the DDR.

Parameters
[in]img_in_axi_stream
[in]sMemBurstRx
[out]soMemWrCmdP0
[out]siMemWrStsP0
[out]soMemWriteP0
[out]sImageLoaded
Returns
Nothing.

Definition at line 287 of file sobel_network_library.hpp.

297 {
298  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
299  #pragma HLS INLINE off
300  #pragma HLS pipeline II=1
301 
302  //-- LOCAL VARIABLES ------------------------------------------------------
303  static ap_uint<TMemWrd> v = 0;
304  // const unsigned int loop_cnt = (MEMDW_512/BITS_PER_10GBITETHRNET_AXI_PACKET);
305  // const unsigned int bytes_per_loop = (BYTES_PER_10GBITETHRNET_AXI_PACKET*loop_cnt);
306  static unsigned int cur_transfers_per_chunk;
307  static unsigned int cnt_wr_stream, cnt_wr_img_loaded;
308  static unsigned int ddr_addr_in;
309  static PacketFsmType enqueueStrToDdrFSM = WAIT_FOR_META;
310  #pragma HLS reset variable=enqueueStrToDdrFSM
311 
312  static ap_uint<32> patternWriteNum;
313  static ap_uint<32> timeoutCnt;
314 
315  static Axis<TMemWrd> memP0;
316  static DmSts memWrStsP0;
317  static unsigned int processed_bytes_rx;
318 
319  #pragma HLS reset variable=cur_transfers_per_chunk
320  #pragma HLS reset variable=cnt_wr_stream
321  #pragma HLS reset variable=cnt_wr_img_loaded
322  #pragma HLS reset variable=ddr_addr_in
323  #pragma HLS reset variable=patternWriteNum
324  #pragma HLS reset variable=timeoutCnt
325  #pragma HLS reset variable=memP0
326  #pragma HLS reset variable=memWrStsP0
327 
328  switch(enqueueStrToDdrFSM)
329  {
330  case WAIT_FOR_META:
331  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - WAIT_FOR_META, processed_bytes_rx=%u\n",
332  processed_bytes_rx);
333 
334  if ( !img_in_axi_stream.empty() )
335  {
336  if ((processed_bytes_rx) == 0) {
337  memP0.tdata = 0;
338  memP0.tlast = 0;
339  memP0.tkeep = 0;
340  patternWriteNum = 0;
341  timeoutCnt = 0;
342  cur_transfers_per_chunk = 0;
343  ddr_addr_in = 0;
344  cnt_wr_stream = 0;
345  v = 0;
346  memWrStsP0.tag = 0;
347  memWrStsP0.interr = 0;
348  memWrStsP0.decerr = 0;
349  memWrStsP0.slverr = 0;
350  memWrStsP0.okay = 0;
351  }
352  enqueueStrToDdrFSM = FSM_CHK_PROC_BYTES;
353  }
354  break;
355 
356  case FSM_CHK_PROC_BYTES:
357  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_CHK_PROC_BYTES, processed_bytes_rx=%u\n", processed_bytes_rx);
358  if (processed_bytes_rx < IMGSIZE-bytes_per_loop) {
359  (processed_bytes_rx) += bytes_per_loop;
360  }
361  else {
362  printf("DEBUG in pRXPathStreamToDDR: WARNING - you've reached the max depth of img. Will put processed_bytes_rx = 0.\n");
363  processed_bytes_rx = 0;
364  }
365  enqueueStrToDdrFSM = FSM_WR_PAT_CMD;
366  break;
367 
368 case FSM_WR_PAT_CMD:
369  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_CMD\n");
370  if ( !soMemWrCmdP0.full() ) {
371  //-- Post a memory write command to SHELL/Mem/Mp0
372  if (processed_bytes_rx == 0){
373  cur_transfers_per_chunk = TRANSFERS_PER_CHUNK_LAST_BURST;
374  }
375  else {
376  cur_transfers_per_chunk = TRANSFERS_PER_CHUNK;
377  }
378  if (patternWriteNum == 0) { // Write cmd only the fitst time of every burst
379  soMemWrCmdP0.write(DmCmd(ddr_addr_in * BPERMDW_512, cur_transfers_per_chunk*BPERMDW_512)); // Byte-addresable
380  }
381  ddr_addr_in++;
382  enqueueStrToDdrFSM = FSM_WR_PAT_LOAD;
383  }
384  break;
385 
386 case FSM_WR_PAT_LOAD:
387  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_LOAD\n");
388  // -- Assemble a 512-bit memory word with input values from stream
389  if (patternWriteNum++ >= cur_transfers_per_chunk - 1) {
390  if (!sMemBurstRx.empty()) {
391  if (sMemBurstRx.read() == true) {
392  patternWriteNum = 0;
393  enqueueStrToDdrFSM = FSM_WR_PAT_DATA;
394  }
395  }
396  }
397  else {
398  if((processed_bytes_rx) == 0) {
399  enqueueStrToDdrFSM = WAIT_FOR_META;
400  }
401  else {
402  enqueueStrToDdrFSM = FSM_CHK_PROC_BYTES;
403  }
404  }
405  break;
406 
407 case FSM_WR_PAT_DATA:
408  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_DATA\n");
409  if (!soMemWriteP0.full()) {
410  //-- Write a memory word to DRAM
411  if (!img_in_axi_stream.empty()) {
412  memP0.tdata = img_in_axi_stream.read();
413  ap_uint<8> keepVal = 0xFF;
414  memP0.tkeep = (ap_uint<64>) (keepVal, keepVal, keepVal, keepVal, keepVal, keepVal, keepVal, keepVal);
415  if (patternWriteNum++ == cur_transfers_per_chunk - 1) {
416  printf("DEBUG: (patternWriteNum == cur_transfers_per_chunk -1) \n");
417  memP0.tlast = 1;
418  cnt_wr_img_loaded = 0;
419  timeoutCnt = 0;
420  patternWriteNum = 0;
421  enqueueStrToDdrFSM = FSM_WR_PAT_STS_A;
422  }
423  else {
424  memP0.tlast = 0;
425  }
426  std::cout << "DEBUG in pRXPathStreamToDDR: Pushing to soMemWriteP0 :" << std::hex << memP0.tdata << std::endl;
427  soMemWriteP0.write(memP0);
428  }
429  }
430  break;
431 
432 case FSM_WR_PAT_STS_A:
433  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_STS_A\n");
434  if (!siMemWrStsP0.empty()) {
435  printf(" 1 \n");
436  //-- Get the memory write status for Mem/Mp0
437  siMemWrStsP0.read(memWrStsP0);
438  enqueueStrToDdrFSM = FSM_WR_PAT_STS_B;
439  }
440  else {
441  if (timeoutCnt++ >= CYCLES_UNTIL_TIMEOUT) {
442  memWrStsP0.tag = 0;
443  memWrStsP0.interr = 0;
444  memWrStsP0.decerr = 0;
445  memWrStsP0.slverr = 0;
446  memWrStsP0.okay = 0;
447  enqueueStrToDdrFSM = FSM_WR_PAT_STS_B;
448  }
449  }
450  break;
451 
452 case FSM_WR_PAT_STS_B:
453  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_STS_B\n");
454  if ((memWrStsP0.tag == 0x0) && (memWrStsP0.okay == 1)) {
455  if ((processed_bytes_rx) == 0) {
456  if (!sImageLoaded.full()) {
457  if (cnt_wr_img_loaded++ >= 1) {
458  sImageLoaded.write(false);
459  enqueueStrToDdrFSM = FSM_WR_PAT_STS_C;
460  }
461  else {
462  sImageLoaded.write(true);
463  }
464  }
465  }
466  else {
467  enqueueStrToDdrFSM = FSM_WR_PAT_STS_C;
468  }
469  }
470  else {
471  ; // TODO: handle errors on memWrStsP0
472  }
473  break;
474 
475 case FSM_WR_PAT_STS_C:
476  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_STS_C\n");
477  if((processed_bytes_rx) == 0) {
478  enqueueStrToDdrFSM = WAIT_FOR_META;
479  }
480  else {
481  enqueueStrToDdrFSM = FSM_CHK_PROC_BYTES;
482  }
483  break;
484 }
485 
486 }
timeoutCnt
ap_uint< 32 > timeoutCnt
Definition: mem_test_flash.cpp:34
patternWriteNum
ap_uint< 32 > patternWriteNum
Definition: mem_test_flash.cpp:31
DmSts::okay
ap_uint< 1 > okay
Definition: memory_utils.hpp:84
DmSts::decerr
ap_uint< 1 > decerr
Definition: memory_utils.hpp:82
DmSts::slverr
ap_uint< 1 > slverr
Definition: memory_utils.hpp:83
DmSts::tag
ap_uint< 4 > tag
Definition: memory_utils.hpp:80
DmSts::interr
ap_uint< 1 > interr
Definition: memory_utils.hpp:81
IMGSIZE
#define IMGSIZE
Definition: xf_gammacorrection_config.h:67
FSM_WR_PAT_STS_B
#define FSM_WR_PAT_STS_B
Definition: harris.hpp:87
FSM_WR_PAT_LOAD
#define FSM_WR_PAT_LOAD
Definition: harris.hpp:84
FSM_WR_PAT_CMD
#define FSM_WR_PAT_CMD
Definition: harris.hpp:83
TRANSFERS_PER_CHUNK
#define TRANSFERS_PER_CHUNK
Definition: harris.hpp:133
FSM_WR_PAT_DATA
#define FSM_WR_PAT_DATA
Definition: harris.hpp:85
FSM_CHK_PROC_BYTES
#define FSM_CHK_PROC_BYTES
Definition: harris.hpp:81
FSM_WR_PAT_STS_A
#define FSM_WR_PAT_STS_A
Definition: harris.hpp:86
FSM_WR_PAT_STS_C
#define FSM_WR_PAT_STS_C
Definition: harris.hpp:88
TRANSFERS_PER_CHUNK_LAST_BURST
#define TRANSFERS_PER_CHUNK_LAST_BURST
Definition: median_blur.cpp:57
enqueueStrToDdrFSM
uint8_t enqueueStrToDdrFSM
Definition: median_blur.cpp:50
CYCLES_UNTIL_TIMEOUT
#define CYCLES_UNTIL_TIMEOUT
Definition: memtest.hpp:96
Axis::tkeep
ap_uint<(D+7)/8 > tkeep
Definition: axi_utils.hpp:49
Axis::tlast
ap_uint< 1 > tlast
Definition: axi_utils.hpp:50
Axis::tdata
ap_uint< D > tdata
Definition: axi_utils.hpp:48

◆ pTHISProcessingData()

template<const unsigned int counter_width = 64>
void pTHISProcessingData ( stream< NetworkWord > &  sRxpToProcp_Data,
stream< NetworkWord > &  sProcpToTxp_Data,
stream< NetworkMetaStream > &  sRxtoProc_Meta,
stream< NetworkMetaStream > &  sProctoTx_Meta,
bool *  start_stop 
)

THIS processing the data once recieved a start command Template function for custom processing.

Parameters
[in]sRxpToProcp_Datastream of data from rx to proc interface
[out]sProcpToTxp_Datastream of data from proc to tx interface
[in]start_stopstart and stop command
[in]lcl_mem0shell-role mp1 memory mapped interfce virtual ptr 0
[in]lcl_mem1shell-role mp1 memory mapped interfce virtual ptr 1
Returns
Nothing.

Definition at line 92 of file sobel_processing.hpp.

106  {
107  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
108 #pragma HLS INLINE off
109  //-- LOCAL VARIABLES ------------------------------------------------------
110  NetworkWord netWord;
111  NetworkWord outNetWord;
112  static NetworkMetaStream outNetMeta = NetworkMetaStream();;
113  static ProcessingFsmType processingFSM = FSM_PROCESSING_WAIT_FOR_META;
114 
115  static ap_uint<16> max_iterations;
116 
117  static local_mem_addr_t first_faulty_address;
118 
119  static ap_uint<32> faulty_addresses_cntr;
120 
121  static local_mem_addr_t max_address_under_test; // byte addressable;
122  static size_t bytes_sent_for_tx =0;
123 
124 #pragma HLS reset variable=processingFSM
125 #pragma HLS reset variable=outNetMeta
126 #pragma HLS reset variable=max_iterations
127 #pragma HLS reset variable=first_faulty_address
128 #pragma HLS reset variable=faulty_addresses_cntr
129 #pragma HLS reset variable=max_address_under_test
130 #pragma HLS reset variable=processingFSM
131 #pragma HLS reset variable=bytes_sent_for_tx
132 
133  static ap_uint<32> testCounter;
134  static ap_uint<counter_width> reading_cntr = 0;
135  static ap_uint<counter_width> writing_cntr = 0;
136  static unsigned int burst_size=1;
137  static local_mem_addr_t tmp_wordaligned_address = 0;
138  static int emptycntr=0;
139 
140 #pragma HLS reset variable=testCounter
141 #pragma HLS reset variable=tmp_wordaligned_address
142 #pragma HLS reset variable=burst_size
143 
144 
145 //assuming that whnever I send a start I must complete the run and then restart unless a stop
146 // or stopping once done with the run iterations
147  switch(processingFSM)
148  {
149  case FSM_PROCESSING_WAIT_FOR_META:
150  #if DEBUG_LEVEL == TRACE_ALL
151  printf("DEBUG proc FSM, I am in the WAIT_FOR_META state\n");
152  #endif
153  //resetting once per test suite
154  max_address_under_test = 0;
155  max_iterations=0;
156  bytes_sent_for_tx = 0;
157  burst_size=1;
158  if ( !sRxtoProc_Meta.empty() && !sProctoTx_Meta.full())
159  {
160  outNetMeta = sRxtoProc_Meta.read();
161  sProctoTx_Meta.write(outNetMeta);
162  processingFSM = FSM_PROCESSING_PCKT_PROC;
163  }
164  break;
165 
166  case FSM_PROCESSING_PCKT_PROC:
167  #if DEBUG_LEVEL == TRACE_ALL
168  printf("DEBUG proc FSM, I am in the PROCESSING_PCKT_PROC state\n");
169  #endif
170 //parse the received data
171  if ( !sRxpToProcp_Data.empty() && !sProcpToTxp_Data.full())
172  {
173  netWord = sRxpToProcp_Data.read();
174  switch (netWord.tdata.range(MEMTEST_COMMANDS_HIGH_BIT,MEMTEST_COMMANDS_LOW_BIT))
175  {
176  case TEST_INVLD_CMD:
177  /* FWD an echo of the invalid*/
178  #if DEBUG_LEVEL == TRACE_ALL
179  printf("DEBUG processing the packet with invalid cmd\n");
180  #endif
181  sProcpToTxp_Data.write(netWord);
182  processingFSM = FSM_PROCESSING_WAIT_FOR_META;
183  break;
184  case TEST_STOP_CMD:
185  /* call with stop (never started), unset, fwd the stop */
186  #if DEBUG_LEVEL == TRACE_ALL
187  printf("DEBUG processing the packet with stop cmd\n");
188  #endif
189  outNetWord.tdata=TEST_STOP_CMD;
190  outNetWord.tkeep = 0xFF;
191  outNetWord.tlast = 1;
192  sProcpToTxp_Data.write(outNetWord);
193  processingFSM = FSM_PROCESSING_WAIT_FOR_META;
194  break;
195  default:
196  /* Execute the test if not invalid or stop*/
197  #if DEBUG_LEVEL == TRACE_ALL
198  printf("DEBUG processing the packet with the address within cmd\n");
199  #endif
200  max_address_under_test = netWord.tdata(MEMTEST_ADDRESS_HIGH_BIT,MEMTEST_ADDRESS_LOW_BIT);
201  max_iterations = netWord.tdata.range(MEMTEST_ITERATIONS_HIGH_BIT,MEMTEST_ITERATIONS_LOW_BIT);
202  #if DEBUG_LEVEL == TRACE_ALL
203  #ifndef __SYNTHESIS__
204  printf("DEBUG processing the packet with the address %s within cmd %s\n", max_address_under_test.to_string().c_str(), max_iterations.to_string().c_str());
205  #endif //__SYNTHESIS__
206  #endif
207  processingFSM = FSM_PROCESSING_BURST_READING;
208  break;
209  }
210  }
211  break;
212 
213  case FSM_PROCESSING_BURST_READING:
214  #if DEBUG_LEVEL == TRACE_ALL
215  printf("DEBUG proc FSM, I am in the FSM_PROCESSING_BURST_READING state\n");
216  #endif
217 //parse the received data
218  if ( !sRxpToProcp_Data.empty())
219  {
220  netWord = sRxpToProcp_Data.read();
221  #if DEBUG_LEVEL == TRACE_ALL
222  std::cout << netWord.tdata.to_string() << std::endl;
223  #endif
224  switch (netWord.tdata.range(MEMTEST_COMMANDS_HIGH_BIT,MEMTEST_COMMANDS_LOW_BIT))
225  {
226  case TEST_BURSTSIZE_CMD:
227  /* extract the busrt size*/
228  burst_size = netWord.tdata.range(MEMTEST_BURST_HIGH_BIT,MEMTEST_BURST_LOW_BIT);
229 
230  #if DEBUG_LEVEL == TRACE_ALL
231  printf("DEBUG processing the packet with burst cmd, and burst size=%u\n",burst_size);
232  #endif
233  processingFSM = FSM_PROCESSING_START;
234  break;
235 
236 
237  default:
238  /*unkown stuff hence using a burst with 1 beat*/
239  #if DEBUG_LEVEL == TRACE_ALL
240  #ifndef __SYNTHESIS__
241  printf("DEBUG processing the packet with smth bad within cmd: %s\n",netWord.tdata.range(MEMTEST_COMMANDS_HIGH_BIT,MEMTEST_COMMANDS_LOW_BIT).to_string().c_str());
242  #endif
243  #endif
244  burst_size=1;
245  sProcpToTxp_Data.write(netWord);
246  processingFSM = FSM_PROCESSING_START;
247  break;
248  }
249  }
250  break;
251 
252 //The hw can begin to do something
253  case FSM_PROCESSING_START:
254  // sOCMDPerfCounter.write(0);//init the counter
255  #if DEBUG_LEVEL == TRACE_ALL
256  printf("DEBUG proc FSM, I am in the START state\n");
257  #endif
258  //setting everything ready to start
259  first_faulty_address = 0;
260  faulty_addresses_cntr = 0;
261  if(max_address_under_test%64==0){
262  tmp_wordaligned_address = max_address_under_test/64;
263  } else {
264  tmp_wordaligned_address = (max_address_under_test/64+1);
265  }
266  #if DEBUG_LEVEL == TRACE_ALL
267  #ifndef __SYNTHESIS__
268  std::cout << " testing the address word aligned" << tmp_wordaligned_address.to_string() << std::endl;
269  #endif
270  #endif
271  reading_cntr = 0;
272  writing_cntr = 0;
273  testCounter = 0;
274  processingFSM = FSM_PROCESSING_DATAFLOW_WRITE;//FSM_PROCESSING_WRITE;
275  break;
276 
277  //run continuously, hence more than once
278  case FSM_PROCESSING_CONTINUOUS_RUN:
279  testCounter += 1;
280  reading_cntr = 0;
281  writing_cntr = 0;
282  faulty_addresses_cntr = 0;
283  first_faulty_address = 0;
284 
285  //stopping conditions: either a Stop or the maximum iterations
286  if(*start_stop && testCounter < max_iterations){
287  #if DEBUG_LEVEL == TRACE_ALL
288  #ifndef __SYNTHESIS__
289  printf("DEBUG processing continuous run (still run, iter %s) max iters: %s\n",testCounter.to_string().c_str(),max_iterations.to_string().c_str());
290  #endif //__SYNTHESIS__
291  #endif
292  // check if need another meta to send out!
293  // if already over the MTU size, or with a command (stop case) or with another iteration I need to send out another meta
294  if(bytes_sent_for_tx >= PACK_SIZE){
295  sProctoTx_Meta.write(outNetMeta);
296  #if DEBUG_LEVEL == TRACE_ALL
297  std::cout << "DEBUG: writing an additional meta with bytes sent equal to " << bytes_sent_for_tx << std::endl;
298  #endif
299  bytes_sent_for_tx = 0;
300  }
301  processingFSM = FSM_PROCESSING_DATAFLOW_WRITE;
302 
303  break;
304  }else{
305  #if DEBUG_LEVEL == TRACE_ALL
306  #ifndef __SYNTHESIS__
307  printf("DEBUG processing continuous run (stop the run at iter %s) max iters: %s \n",testCounter.to_string().c_str(),max_iterations.to_string().c_str());
308  #endif //__SYNTHESIS__
309  #endif
310  //signal the end of the packet with the iteration of the tests performed
311  outNetWord.tdata.range(MEMTEST_COMMANDS_HIGH_BIT,MEMTEST_COMMANDS_LOW_BIT)=TEST_ENDOFTESTS_CMD;
312  outNetWord.tdata.range(NETWORK_WORD_BIT_WIDTH-1,MEMTEST_COMMANDS_HIGH_BIT+1)=testCounter;
313  outNetWord.tkeep = 0xFF;
314  outNetWord.tlast = 1;
315  sProcpToTxp_Data.write(outNetWord);
316  processingFSM = FSM_PROCESSING_WAIT_FOR_META;
317  break;
318  }
319 
325  //Begin to process
326  case FSM_PROCESSING_DATAFLOW_WRITE:
327  #if DEBUG_LEVEL == TRACE_ALL
328  printf("DEBUG processing write dataflow\n");
329  #endif
330  pWriteDataflowMemTest<top_param_maximum_number_of_beats>( lcl_mem0,
331  tmp_wordaligned_address , &writing_cntr,&testCounter,burst_size);
332  processingFSM = FSM_PROCESSING_DATAFLOW_READ;
333  break;
334 
335  case FSM_PROCESSING_WAIT_FOR_DDR_CONTROLLER_EMPTYNESS:
336  #if DEBUG_LEVEL == TRACE_ALL
337  printf("DEBUG processing the output of a run\n");
338  #endif
339  emptycntr++;
340  if(emptycntr==DDR_LATENCY+1){
341  processingFSM = FSM_PROCESSING_DATAFLOW_READ;
342  emptycntr=0;
343  }
344  break;
345 
346  case FSM_PROCESSING_DATAFLOW_READ:
347 #if DEBUG_LEVEL == TRACE_ALL
348  printf("DEBUG processing read dataflow\n");
349 #endif
350  pReadDataflowMemTest<top_param_maximum_number_of_beats>(lcl_mem1,
351  tmp_wordaligned_address ,&reading_cntr,&faulty_addresses_cntr, &first_faulty_address,burst_size);
352  processingFSM = FSM_PROCESSING_OUTPUT;
353  break;
354 
360  case FSM_PROCESSING_OUTPUT:
361  #if DEBUG_LEVEL == TRACE_ALL
362  printf("DEBUG processing the output of a run\n");
363  #endif
364  if(!sProcpToTxp_Data.full()){
365  outNetWord.tdata = max_address_under_test;
366  outNetWord.tkeep = 0xFF;
367  outNetWord.tlast = 0;
368  sProcpToTxp_Data.write(outNetWord);
369  bytes_sent_for_tx += 8;
370  processingFSM = FSM_PROCESSING_OUTPUT_2;
371  }
372  break;
373 
374  case FSM_PROCESSING_OUTPUT_2:
375  #if DEBUG_LEVEL == TRACE_ALL
376  #ifndef __SYNTHESIS__
377  printf("DEBUG processing the output of a run part 2; faulty address cntr %s\n",faulty_addresses_cntr.to_string().c_str());
378  #endif
379  #endif
380  if(!sProcpToTxp_Data.full()){
381  outNetWord.tdata=faulty_addresses_cntr;
382  outNetWord.tkeep = 0xFF;
383  outNetWord.tlast = 0;
384  sProcpToTxp_Data.write(outNetWord);
385  bytes_sent_for_tx += 8 ;
386  processingFSM = FSM_PROCESSING_OUTPUT_3;
387  }
388  break;
389  case FSM_PROCESSING_OUTPUT_3:
390  #if DEBUG_LEVEL == TRACE_ALL
391  #ifndef __SYNTHESIS__
392  printf("DEBUG processing the output of a run part 3: first faulty address %s\n",first_faulty_address.to_string().c_str());
393  #endif
394  #endif
395  if(!sProcpToTxp_Data.full()){
396  outNetWord.tdata=first_faulty_address;
397  outNetWord.tkeep = 0xFF;
398  outNetWord.tlast = 0;
399  sProcpToTxp_Data.write(outNetWord);
400  bytes_sent_for_tx += 8;
401  processingFSM = FSM_PROCESSING_OUTPUT_4;
402  }
403  break;
404  case FSM_PROCESSING_OUTPUT_4:
405  #if DEBUG_LEVEL == TRACE_ALL
406  printf("DEBUG processing the output of a run part 4\n");
407  #endif
408  if(!sProcpToTxp_Data.full()){
409  outNetWord.tdata = writing_cntr;
410  outNetWord.tkeep = 0xFF;
411  outNetWord.tlast = 0;
412  sProcpToTxp_Data.write(outNetWord);
413  bytes_sent_for_tx += 8;
414  processingFSM = FSM_PROCESSING_OUTPUT_5;
415  }
416  break;
417  case FSM_PROCESSING_OUTPUT_5:
418  #if DEBUG_LEVEL == TRACE_ALL
419  printf("DEBUG processing the output of a run part 4\n");
420  #endif
421  if(!sProcpToTxp_Data.full()){
422  outNetWord.tdata= reading_cntr;
423  outNetWord.tkeep = 0xFF;
424  outNetWord.tlast = 0;
425  sProcpToTxp_Data.write(outNetWord);
426  bytes_sent_for_tx += 8;
427  processingFSM = FSM_PROCESSING_CONTINUOUS_RUN;
428  }
429  break;
430 
431  }
432 };
MEMTEST_ADDRESS_HIGH_BIT
#define MEMTEST_ADDRESS_HIGH_BIT
Definition: memtest_processing.hpp:60
local_mem_addr_t
ap_uint< 40 > local_mem_addr_t
Definition: memtest_pattern_library.hpp:45
MEMTEST_COMMANDS_HIGH_BIT
#define MEMTEST_COMMANDS_HIGH_BIT
Definition: memtest.hpp:67
MEMTEST_ITERATIONS_HIGH_BIT
#define MEMTEST_ITERATIONS_HIGH_BIT
Definition: memtest_processing.hpp:63
MEMTEST_BURST_HIGH_BIT
#define MEMTEST_BURST_HIGH_BIT
Definition: memtest_processing.hpp:66
MEMTEST_BURST_LOW_BIT
#define MEMTEST_BURST_LOW_BIT
Definition: memtest_processing.hpp:67
MEMTEST_ADDRESS_LOW_BIT
#define MEMTEST_ADDRESS_LOW_BIT
Definition: memtest_processing.hpp:61
MEMTEST_ITERATIONS_LOW_BIT
#define MEMTEST_ITERATIONS_LOW_BIT
Definition: memtest_processing.hpp:64
MEMTEST_COMMANDS_LOW_BIT
#define MEMTEST_COMMANDS_LOW_BIT
Definition: memtest.hpp:68
PACK_SIZE
#define PACK_SIZE
Definition: config.h:51
FSM_PROCESSING_OUTPUT_2
#define FSM_PROCESSING_OUTPUT_2
Definition: sobel_processing.hpp:46
FSM_PROCESSING_WAIT_FOR_META
#define FSM_PROCESSING_WAIT_FOR_META
Definition: sobel_processing.hpp:38
ProcessingFsmType
#define ProcessingFsmType
Definition: sobel_processing.hpp:52
FSM_PROCESSING_OUTPUT_3
#define FSM_PROCESSING_OUTPUT_3
Definition: sobel_processing.hpp:47
FSM_PROCESSING_WAIT_FOR_DDR_CONTROLLER_EMPTYNESS
#define FSM_PROCESSING_WAIT_FOR_DDR_CONTROLLER_EMPTYNESS
Definition: sobel_processing.hpp:51
FSM_PROCESSING_OUTPUT
#define FSM_PROCESSING_OUTPUT
Definition: sobel_processing.hpp:45
FSM_PROCESSING_CONTINUOUS_RUN
#define FSM_PROCESSING_CONTINUOUS_RUN
Definition: sobel_processing.hpp:50
FSM_PROCESSING_DATAFLOW_WRITE
#define FSM_PROCESSING_DATAFLOW_WRITE
Definition: sobel_processing.hpp:43
FSM_PROCESSING_OUTPUT_4
#define FSM_PROCESSING_OUTPUT_4
Definition: sobel_processing.hpp:48
FSM_PROCESSING_START
#define FSM_PROCESSING_START
Definition: sobel_processing.hpp:41
FSM_PROCESSING_DATAFLOW_READ
#define FSM_PROCESSING_DATAFLOW_READ
Definition: sobel_processing.hpp:44
FSM_PROCESSING_BURST_READING
#define FSM_PROCESSING_BURST_READING
Definition: sobel_processing.hpp:42
FSM_PROCESSING_OUTPUT_5
#define FSM_PROCESSING_OUTPUT_5
Definition: sobel_processing.hpp:49
FSM_PROCESSING_PCKT_PROC
#define FSM_PROCESSING_PCKT_PROC
Definition: sobel_processing.hpp:39
processingFSM
uint8_t processingFSM
Definition: uppercase.cpp:57
TEST_ENDOFTESTS_CMD
@ TEST_ENDOFTESTS_CMD
Definition: memtest.hpp:60
TEST_STOP_CMD
@ TEST_STOP_CMD
Definition: memtest.hpp:61
TEST_BURSTSIZE_CMD
@ TEST_BURSTSIZE_CMD
Definition: memtest.hpp:59
TEST_INVLD_CMD
@ TEST_INVLD_CMD
Definition: memtest.hpp:63
NETWORK_WORD_BIT_WIDTH
#define NETWORK_WORD_BIT_WIDTH
Definition: network.hpp:46

◆ pTXPath()

void pTXPath ( stream< NetworkWord > &  soTHIS_Shl_Data,
stream< NetworkMetaStream > &  soNrc_meta,
stream< NetworkWord > &  sProcpToTxp_Data,
stream< NetworkMetaStream > &  sRxtoTx_Meta,
stream< NodeId > &  sDstNode_sig,
unsigned int *  processed_word_tx,
ap_uint< 32 > *  pi_rank 
)

Transmit Path - From THIS to SHELL.

Parameters
[out]soTHIS_Shl_Data
[out]soNrc_meta
[in]sProcpToTxp_Data
[in]sRxtoTx_Meta
[in]pi_rank
[in]sDstNode_sig
Returns
Nothing.

Definition at line 513 of file sobel_network_library.hpp.

522 {
523  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
524  //#pragma HLS DATAFLOW interval=1
525  #pragma HLS INLINE off
526 
527  //-- STATIC DATAFLOW VARIABLES ------------------------------------------
528  static NodeId dst_rank;
529  static PacketFsmType dequeueFSM = WAIT_FOR_META;
530  #pragma HLS reset variable=dequeueFSM
531  #pragma HLS reset variable=dst_rank
532 
533  //-- LOCAL VARIABLES ------------------------------------------------------
534  NetworkWord netWordTx;
535  NetworkMeta meta_in = NetworkMeta();
536  #pragma HLS reset variable=netWordTx
537 
538  switch(dequeueFSM)
539  {
540  default:
541  case WAIT_FOR_META:
542  if(!sDstNode_sig.empty())
543  {
544  dst_rank = sDstNode_sig.read();
545  dequeueFSM = WAIT_FOR_STREAM_PAIR;
546  //Sobel app needs to be reset to process new rank
547  }
548  break;
549  case WAIT_FOR_STREAM_PAIR:
550  #if DEBUG_LEVEL == TRACE_ALL
551  printf("DEBUG in pTXPath: dequeueFSM=%d - WAIT_FOR_STREAM_PAIR, *processed_word_tx=%u\n",
552  dequeueFSM, *processed_word_tx);
553  #endif
554  //-- Forward incoming chunk to SHELL
555  // *processed_word_tx = 0;
556  //Sobel-related
557  if (*processed_word_tx == MIN_TX_LOOPS) {
558  *processed_word_tx = 0;
559  }
560 
561  if (( !sProcpToTxp_Data.empty() && !sRxtoTx_Meta.empty()
562  && !soTHIS_Shl_Data.full() && !soNrc_meta.full() ))
563  {
564  netWordTx = sProcpToTxp_Data.read();
565 
566  // in case MTU=8 ensure tlast is set in WAIT_FOR_STREAM_PAIR and don't visit PROCESSING_PACKET
567  if (PACK_SIZE == 8)
568  {
569  netWordTx.tlast = 1;
570  }
571  soTHIS_Shl_Data.write(netWordTx);
572 
573  meta_in = sRxtoTx_Meta.read().tdata;
574  NetworkMetaStream meta_out_stream = NetworkMetaStream();
575  meta_out_stream.tlast = 1;
576  meta_out_stream.tkeep = 0xFF; //just to be sure
577 
578  //Sobel-related Forcing the SHELL to wait for tlast
579  meta_out_stream.tdata.len = 0;
580 
581  meta_out_stream.tdata.dst_rank = dst_rank;
582  meta_out_stream.tdata.src_rank = (NodeId) *pi_rank;
583  meta_out_stream.tdata.dst_port = meta_in.src_port;
584  meta_out_stream.tdata.src_port = meta_in.dst_port;
585 
586  soNrc_meta.write(meta_out_stream);
587 
588  (*processed_word_tx)++;
589  printf("DEBUG: Checking netWordTx.tlast...\n");
590  if(netWordTx.tlast != 1)
591  {
592  dequeueFSM = PROCESSING_PACKET;
593  }
594  }
595  break;
596 
597  case PROCESSING_PACKET:
598  #if DEBUG_LEVEL == TRACE_ALL
599  printf("DEBUG in pTXPath: dequeueFSM=%d - PROCESSING_PACKET, *processed_word_tx=%u\n",
600  dequeueFSM, *processed_word_tx);
601  #endif
602  if( !sProcpToTxp_Data.empty() && !soTHIS_Shl_Data.full())
603  {
604  netWordTx = sProcpToTxp_Data.read();
605  // This is a normal termination of the axi stream from vitis functions
606  if(netWordTx.tlast == 1)
607  {
608  dequeueFSM = WAIT_FOR_STREAM_PAIR;
609  }
610 
611  // This is our own termination based on the custom MTU we have set in PACK_SIZE.
612  // TODO: We can map PACK_SIZE to a dynamically assigned value either through MMIO or header
613  // in order to have a functional bitstream for any MTU size
614  (*processed_word_tx)++;
615  if (((*processed_word_tx)*8) % PACK_SIZE == 0)
616  {
617  netWordTx.tlast = 1;
618  printf("DEBUG: A netWordTx.tlast=1 ... sRxpToTxp_Data.empty()==%u \n", sRxpToTxp_Data.empty());
619  dequeueFSM = WAIT_FOR_STREAM_PAIR;
620  }
621 
622  soTHIS_Shl_Data.write(netWordTx);
623  }
624  break;
625  }
626 }
WAIT_FOR_STREAM_PAIR
#define WAIT_FOR_STREAM_PAIR
Definition: memtest.hpp:72
dequeueFSM
uint8_t dequeueFSM
Definition: uppercase.cpp:55
NetworkMetaStream::tkeep
ap_uint< 8 > tkeep
Definition: network.hpp:110
NetworkMetaStream::tdata
NetworkMeta tdata
Definition: network.hpp:109
NetworkMeta::len
NetworkDataLength len
Definition: network.hpp:99
NetworkMeta::dst_rank
NodeId dst_rank
Definition: network.hpp:95
NetworkMeta::src_rank
NodeId src_rank
Definition: network.hpp:97
NetworkMeta::src_port
NrcPort src_port
Definition: network.hpp:98
NetworkMeta::dst_port
NrcPort dst_port
Definition: network.hpp:96

◆ sobel()

void sobel ( ap_uint< 32 > *  pi_rank,
ap_uint< 32 > *  pi_size,
stream< NetworkWord > &  siSHL_This_Data,
stream< NetworkWord > &  soTHIS_Shl_Data,
stream< NetworkMetaStream > &  siNrc_meta,
stream< NetworkMetaStream > &  soNrc_meta,
ap_uint< 32 > *  po_rx_ports,
stream< DmCmd > &  soMemWrCmdP0,
stream< DmSts > &  siMemWrStsP0,
stream< Axis< 512 > > &  soMemWriteP0,
membus_t *  lcl_mem0,
membus_t *  lcl_mem1 
)

Main process of the Sobel Application directives.

Deprecated:
This functions is using deprecated AXI stream interface
Returns
Nothing.

Definition at line 51 of file sobel.cpp.

84 {
85 
86 
87 //-- DIRECTIVES FOR THE BLOCK ---------------------------------------------
88 #pragma HLS INTERFACE axis register both port=siSHL_This_Data
89 #pragma HLS INTERFACE axis register both port=soTHIS_Shl_Data
90 
91 #pragma HLS INTERFACE axis register both port=siNrc_meta
92 #pragma HLS INTERFACE axis register both port=soNrc_meta
93 
94 #pragma HLS INTERFACE ap_ovld register port=po_rx_ports name=poROL_NRC_Rx_ports
95 
96 #if HLS_VERSION < 20211
97 #pragma HLS INTERFACE ap_stable register port=pi_rank name=piFMC_ROL_rank
98 #pragma HLS INTERFACE ap_stable register port=pi_size name=piFMC_ROL_size
99 #elif HLS_VERSION >= 20211
100  #pragma HLS stable variable=pi_rank
101  #pragma HLS stable variable=pi_size
102 #else
103  printf("ERROR: Invalid HLS_VERSION=%s\n", HLS_VERSION);
104  exit(-1);
105 #endif
106 
107 #ifdef ENABLE_DDR
108 
109 // Bundling: SHELL / Role / Mem / Mp0 / Write Interface
110 #pragma HLS INTERFACE axis register both port=soMemWrCmdP0
111 #pragma HLS INTERFACE axis register both port=siMemWrStsP0
112 #pragma HLS INTERFACE axis register both port=soMemWriteP0
113 
114 #if HLS_VERSION <= 20201
115 #pragma HLS DATA_PACK variable=soMemWrCmdP0 instance=soMemWrCmdP0
116 #pragma HLS DATA_PACK variable=siMemWrStsP0 instance=siMemWrStsP0
117 #elif HLS_VERSION >= 20211
118 #pragma HLS aggregate variable=soMemWrCmdP0 compact=bit
119 #pragma HLS aggregate variable=siMemWrStsP0 compact=bit
120 #else
121  printf("ERROR: Invalid HLS_VERSION=%s\n", HLS_VERSION);
122  exit(-1);
123 #endif
124 
125 const unsigned int ddr_mem_depth = TOTMEMDW_512;
126 const unsigned int ddr_latency = DDR_LATENCY;
127 
128 
129 // When max burst size is 1KB, with 512bit bus we get 16 burst transactions
130 // When max burst size is 4KB, with 512bit bus we get 64 burst transactions
131 const unsigned int max_axi_rw_burst_length = 64;
132 
133 // Mapping LCL_MEM0 interface to moMEM_Mp1 channel
134 #pragma HLS INTERFACE m_axi depth=ddr_mem_depth port=lcl_mem0 bundle=moMEM_Mp1\
135  max_read_burst_length=max_axi_rw_burst_length max_write_burst_length=max_axi_rw_burst_length offset=direct \
136  num_read_outstanding=16 num_write_outstanding=16 latency=ddr_latency
137 
138 // Mapping LCL_MEM1 interface to moMEM_Mp1 channel
139 #pragma HLS INTERFACE m_axi depth=ddr_mem_depth port=lcl_mem1 bundle=moMEM_Mp1 \
140  max_read_burst_length=max_axi_rw_burst_length max_write_burst_length=max_axi_rw_burst_length offset=direct \
141  num_read_outstanding=16 num_write_outstanding=16 latency=ddr_latency
142 
143 #endif
144 
145  #pragma HLS DATAFLOW
146 
147  //-- LOCAL VARIABLES ------------------------------------------------------
148  NetworkMetaStream meta_tmp = NetworkMetaStream();
149  static stream<NetworkWord> sRxpToTxp_Data("sRxpToTxP_Data"); // FIXME: works even with no static
150  static stream<NetworkMetaStream> sRxtoTx_Meta("sRxtoTx_Meta");
151  static unsigned int processed_word_rx;
152  static unsigned int processed_bytes_rx;
153  static unsigned int processed_word_tx = 0;
154  static stream<bool> sImageLoaded("sImageLoaded");
155  static bool skip_read;
156  static bool write_chunk_to_ddr_pending;
157  static bool ready_to_accept_new_data;
158  static bool signal_init;
159  const int tot_transfers = TOT_TRANSFERS;
160 #ifdef ENABLE_DDR
161  static stream<ap_uint<MEMDW_512>> img_in_axi_stream ("img_in_axi_stream");
162  const unsigned int img_in_axi_stream_depth = TRANSFERS_PER_CHUNK; // the AXI burst size
163  static stream<bool> sMemBurstRx("sMemBurstRx");
164 
165 #else
166  const int img_in_axi_stream_depth = MIN_RX_LOOPS;
167  const int img_out_axi_stream_depth = MIN_TX_LOOPS;
168  static stream<ap_uint<INPUT_PTR_WIDTH>> img_in_axi_stream ("img_in_axi_stream");
169  static stream<ap_uint<OUTPUT_PTR_WIDTH>> img_out_axi_stream ("img_out_axi_stream");
170 #endif
171  static stream<NodeId> sDstNode_sig("sDstNode_sig");
172 
173 
174 //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
175 #pragma HLS stream variable=sRxtoTx_Meta depth=tot_transfers
176 #pragma HLS reset variable=processed_word_rx
177 #pragma HLS reset variable=processed_word_tx
178 #pragma HLS reset variable=processed_bytes_rx
179 //#pragma HLS reset variable=image_loaded
180 #pragma HLS stream variable=sImageLoaded depth=1
181 #pragma HLS reset variable=skip_read
182 #pragma HLS reset variable=write_chunk_to_ddr_pending
183 //#pragma HLS stream variable=sWriteChunkToDdrPending depth=2
184 #pragma HLS reset variable=ready_to_accept_new_data
185 #pragma HLS reset variable=signal_init
186 #pragma HLS STREAM variable=sDstNode_sig depth=1
187 
188 #ifdef ENABLE_DDR
189 #pragma HLS stream variable=img_in_axi_stream depth=img_in_axi_stream_depth
190 #pragma HLS stream variable=sProcessed_bytes_rx depth=img_in_axi_stream_depth
191 #else
192 #pragma HLS stream variable=img_in_axi_stream depth=img_in_axi_stream_depth
193 #pragma HLS stream variable=img_out_axi_stream depth=img_out_axi_stream_depth
194 #endif
195 
196 
197 
198  pPortAndDestionation(
199  pi_rank,
200  pi_size,
201  sDstNode_sig,
202  po_rx_ports
203  );
204 
205 #ifdef ENABLE_DDR
206 
207  pRXPathNetToStream(
208  siSHL_This_Data,
209  siNrc_meta,
210  sRxtoTx_Meta,
211  img_in_axi_stream,
212  sMemBurstRx
213  );
214 
215  pRXPathStreamToDDR(
216  img_in_axi_stream,
217  sMemBurstRx,
218  //---- P0 Write Path (S2MM) -----------
219  soMemWrCmdP0,
220  siMemWrStsP0,
221  soMemWriteP0,
222  //---- P1 Memory mapped ---------------
223  //&processed_bytes_rx,
224  sImageLoaded
225  );
226 
227 
228 
229  #else // !ENABLE_DDR
230 
231  pRXPath(
232  siSHL_This_Data,
233  siNrc_meta,
234  sRxtoTx_Meta,
235  img_in_axi_stream,
236  meta_tmp,
237  &processed_word_rx,
238  &processed_bytes_rx,
239  sImageLoaded
240  );
241 
242 #endif // ENABLE_DDR
243 
244  pProcPath(
245  sRxpToTxp_Data,
246 #ifdef ENABLE_DDR
247  lcl_mem0,
248  lcl_mem1,
249 #else
250  img_in_axi_stream,
251  img_out_axi_stream,
252 #endif
253  sImageLoaded
254  );
255 
256  pTXPath(
257  soTHIS_Shl_Data,
258  soNrc_meta,
259  sRxpToTxp_Data,
260  sRxtoTx_Meta,
261  sDstNode_sig,
262  &processed_word_tx,
263  pi_rank,
264  pi_size
265  );
266 }
pProcPath
void pProcPath(stream< NetworkWord > &sRxpToTxp_Data, stream< NetworkMetaStream > &sRxtoTx_Meta, NetworkMetaStream meta_tmp, varin *instruct, double *out, unsigned int *processed_word_rx, unsigned int *processed_word_proc, unsigned int *struct_loaded)
Processing Path - Main processing FSM for Vitis kernels.
Definition: mceuropeanengine.cpp:217
TOT_TRANSFERS
#define TOT_TRANSFERS
Definition: config.h:70
pRXPathNetToStream
void pRXPathNetToStream(stream< NetworkWord > &siSHL_This_Data, stream< NetworkMetaStream > &siNrc_meta, stream< NetworkMetaStream > &sRxtoTx_Meta, stream< ap_uint< 512 >> &img_in_axi_stream, stream< bool > &sMemBurstRx)
Receive Path - From SHELL to THIS.
Definition: median_blur.cpp:432
pRXPathStreamToDDR
void pRXPathStreamToDDR(stream< ap_uint< 512 >> &img_in_axi_stream, stream< bool > &sMemBurstRx, stream< DmCmd > &soMemWrCmdP0, stream< DmSts > &siMemWrStsP0, stream< Axis< 512 > > &soMemWriteP0, stream< bool > &sImageLoaded)
Receive Path - From SHELL to THIS.
Definition: median_blur.cpp:530
pPortAndDestionation
void pPortAndDestionation(ap_uint< 32 > *pi_rank, ap_uint< 32 > *pi_size, stream< NodeId > &sDstNode_sig, ap_uint< 32 > *po_rx_ports)
pPortAndDestionation - Setup the port and the destination rank.
Definition: memtest_library.hpp:71
pRXPath
void pRXPath(stream< NetworkWord > &siSHL_This_Data, stream< NetworkMetaStream > &siNrc_meta, stream< NetworkMetaStream > &sRxtoProc_Meta, stream< NetworkWord > &sRxpToProcp_Data, NetworkMetaStream meta_tmp, bool *start_stop, unsigned int *processed_word_rx, unsigned int *processed_bytes_rx)
Receive Path - From SHELL to THIS.
Definition: memtest_library.hpp:121
pTXPath
void pTXPath(stream< NetworkWord > &soTHIS_Shl_Data, stream< NetworkMetaStream > &soNrc_meta, stream< NetworkWord > &sProcpToTxp_Data, stream< NetworkMetaStream > &sRxtoTx_Meta, stream< NodeId > &sDstNode_sig, unsigned int *processed_word_tx, ap_uint< 32 > *pi_rank)
Transmit Path - From THIS to SHELL.
Definition: memtest_library.hpp:251
ENABLE_DDR
#define ENABLE_DDR
Definition: memtest.hpp:42
TOTMEMDW_512
#define TOTMEMDW_512
Definition: memtest.hpp:93
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◆ sobelAccelMem()

void sobelAccelMem ( membus_t *  img_inp,
membus_t *  img_out1,
membus_t *  img_out2,
int  rows,
int  cols 
)

Top-level accelerated function of the Sobel Application with memory mapped interfaces.

Returns
Nothing.

Definition at line 160 of file xf_sobel_accel.cpp.

163  {
164  // clang-format on
165  #pragma HLS INLINE off
166 
167  xf::cv::Mat<TYPE, HEIGHT, WIDTH, NPIX> imgInput(rows, cols);
168  // clang-format off
169  #pragma HLS stream variable=imgInput.data depth=2
170  // clang-format on
171 
172  #ifndef FAKE_Sobel
173  xf::cv::Mat<TYPE, HEIGHT, WIDTH, NPIX> _dstgx(rows, cols);
174  // clang-format off
175  #pragma HLS stream variable=_dstgx.data depth=2
176  // clang-format on
177  xf::cv::Mat<TYPE, HEIGHT, WIDTH, NPIX> _dstgy(rows, cols);
178  // clang-format off
179  #pragma HLS stream variable=_dstgy.data depth=2
180  // clang-format on
181  #endif
182 
183  // clang-format off
184  #pragma HLS DATAFLOW
185  // clang-format on
186 
187  // Feed a cv matrix from ddr memory
188  xf::cv::Array2xfMat<MEMDW_512, XF_8UC1, HEIGHT, WIDTH, NPIX>(img_inp, imgInput);
189 
190  #ifdef FAKE_Sobel
191  // Feed ddr memory from a cv matrix
192  xf::cv::xfMat2Array<MEMDW_512, XF_8UC1, HEIGHT, WIDTH, NPIX>(imgInput, img_out1);
193  // Feed ddr memory from a cv matrix
194  xf::cv::xfMat2Array<MEMDW_512, XF_8UC1, HEIGHT, WIDTH, NPIX>(imgInput, img_out2);
195 
196  #else
197 
198  // xf::cv::medianBlur<WINDOW_SIZE, XF_BORDER_REPLICATE, TYPE, HEIGHT, WIDTH, NPC1>(imgInput, imgOutput);
199  xf::cv::Sobel<XF_BORDER_CONSTANT, FILTER_WIDTH,
200  IN_TYPE, TYPE, HEIGHT, WIDTH,
201  NPC1, XF_USE_URAM>(in_mat, _dstgx,_dstgy);
202 
203  // Feed ddr memory from a cv matrix
204  xf::cv::xfMat2Array<MEMDW_512, XF_8UC1, HEIGHT, WIDTH, NPIX>(_dstgx, img_out1);
205  // Feed ddr memory from a cv matrix
206  xf::cv::xfMat2Array<MEMDW_512, XF_8UC1, HEIGHT, WIDTH, NPIX>(_dstgy, img_out2);
207 
208  #endif
209 
210 
211 }
FILTER_WIDTH
#define FILTER_WIDTH
Definition: xf_config_params.h:35
XF_USE_URAM
#define XF_USE_URAM
Definition: xf_config_params.h:41
NPC1
#define NPC1
Definition: xf_gammacorrection_config.h:43
IN_TYPE
#define IN_TYPE
Definition: xf_gammacorrection_config.h:71

◆ storeWordToArray()

template<typename TInImg , const unsigned int img_pckts>
void storeWordToArray ( uint64_t  input,
TInImg  img[img_pckts],
unsigned int *  processed_word,
unsigned int *  image_loaded 
)

Store a net word to local memory.

Returns
Nothing.

Definition at line 269 of file sobel_hw_common.hpp.

271 {
272  #pragma HLS INLINE
273 
274  img[*processed_word] = (TInImg) input;
275  printf("DEBUG in storeWordToArray: input = %u = 0x%16.16llX \n", input, input);
276  printf("DEBUG in storeWordToArray: img[%u]= %u = 0x%16.16llX \n", *processed_word,
277  (uint64_t)img[*processed_word], (uint64_t)img[*processed_word]);
278  if (*processed_word < img_pckts-1) {
279  *processed_word++;
280  }
281  else {
282  printf("DEBUG in storeWordToArray: WARNING - you've reached the max depth of img[%u]. Will put *processed_word = 0.\n", *processed_word);
283  *processed_word = 0;
284  *image_loaded = 1;
285  }
286 }
test.input
string input
Definition: test.py:9

◆ storeWordToAxiStream()

template<typename Tin , const unsigned int loop_cnt, const unsigned int bytes_per_loop, const unsigned int max_data_transfer>
void storeWordToAxiStream ( NetworkWord  word,
Tin &  img_in_axi_stream,
unsigned int *  processed_word_rx,
unsigned int *  processed_bytes_rx,
stream< bool > &  sImageLoaded 
)

Store a net word to a local AXI stream.

Returns
Nothing.

Definition at line 222 of file sobel_hw_common.hpp.

230 {
231  #pragma HLS INLINE
232  Data_t_in v;
233  // const unsigned int loop_cnt = (BITS_PER_10GBITETHRNET_AXI_PACKET/INPUT_PTR_WIDTH);
234  // const unsigned int bytes_per_loop = (BYTES_PER_10GBITETHRNET_AXI_PACKET/loop_cnt);
235  unsigned int bytes_with_keep = 0;
236  for (unsigned int i=0; i<loop_cnt; i++) {
237  if ((word.tkeep >> i) == 0) {
238  printf("WARNING: value with tkeep=0 at i=%u\n", i);
239  continue;
240  }
241  v.data = (ap_uint<INPUT_PTR_WIDTH>)(word.tdata >> i*8);
242  v.keep = word.tkeep;
243  v.last = word.tlast;
244  img_in_axi_stream.write(v.data);
245  bytes_with_keep += bytes_per_loop;
246  }
247  if (*processed_bytes_rx < max_data_transfer){
248  // IMGSIZE-BYTES_PER_10GBITETHRNET_AXI_PACKET) {
249  (*processed_bytes_rx) += bytes_with_keep;
250  if (!sImageLoaded.full()) {
251  sImageLoaded.write(false);
252  }
253  }
254  else {
255  printf("DEBUG in storeWordToAxiStream: WARNING - you've reached the max depth of img. Will put *processed_bytes_rx = 0.\n");
256  *processed_bytes_rx = 0;
257  if (!sImageLoaded.full()) {
258  sImageLoaded.write(true);
259  }
260  }
261 }
Data_t_in
#define Data_t_in
Definition: memtest.cpp:29

Variable Documentation

◆ max_counter_cc

const unsigned long int max_counter_cc = 4000000

Definition at line 296 of file sobel_hw_common.hpp.