cloudFPGA (cF) API  1.0
The documentation of the source code of cloudFPGA (cF)
warp_transform.hpp File Reference

The Role for a WarpTransform Example application (UDP or TCP) More...

#include <stdio.h>
#include <iostream>
#include <fstream>
#include <string>
#include <math.h>
#include <hls_stream.h>
#include "ap_int.h"
#include <stdint.h>
#include "network.hpp"
#include "memory_utils.hpp"
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Classes

struct  Axis< D >
 

Macros

#define ENABLE_DDR
 
#define WARPTRANSFORM_COMMANDS_HIGH_BIT   WARPTRANSFORM_COMMANDS_BITWIDTH-1
 
#define WARPTRANSFORM_COMMANDS_LOW_BIT   0
 
#define WARPTRANSFORM_COMMANDS_BITWIDTH   8
 
#define TRANSFORM_MATRIX_DIM   9
 
#define ROLE_IS_WARPTRANSFORM
 
#define WAIT_FOR_META   0
 
#define WAIT_FOR_STREAM_PAIR   1
 
#define PROCESSING_PACKET   2
 
#define LOAD_IN_STREAM   3
 
#define WARPTRANSFORM_RETURN_RESULTS   4
 
#define WARPTRANSFORM_RETURN_RESULTS_ABSORB_DDR_LAT   5
 
#define WARPTRANSFORM_RETURN_RESULTS_UNPACK   6
 
#define WARPTRANSFORM_RETURN_RESULTS_FWD   7
 
#define WAIT_FOR_TX   8
 
#define FSM_IDLE   9
 
#define FSM_CHK_SKIP   10
 
#define FSM_CHK_PROC_BYTES   11
 
#define FSM_CHK_WRT_CHNK_TO_DDR_PND   12
 
#define FSM_WR_PAT_CMD   13
 
#define FSM_WR_PAT_LOAD   14
 
#define FSM_WR_PAT_DATA   15
 
#define FSM_WR_PAT_STS_A   16
 
#define FSM_WR_PAT_STS_B   17
 
#define FSM_WR_PAT_STS_C   18
 
#define PROCESSING_PACKET_TXMAT   19
 
#define PROCESSING_PACKET_IMGMAT   20
 
#define WAIT_FOR_META_IMGMAT   21
 
#define PUSH_REMAINING_META   22
 
#define PacketFsmType   uint8_t
 
#define DEFAULT_TX_PORT   2718
 
#define DEFAULT_RX_PORT   2718
 
#define PORTS_OPENED   0x1F
 
#define Data_t_in   ap_axiu<INPUT_PTR_WIDTH, 0, 0, 0>
 
#define Data_t_out   ap_axiu<OUTPUT_PTR_WIDTH, 0, 0, 0>
 
#define MAX_NB_OF_ELMT_READ   16
 
#define MAX_NB_OF_WORDS_READ   (MAX_NB_OF_ELMT_READ*sizeof(mat_elmt_t)/BPERDW)
 
#define MAX_NB_OF_ELMT_PERDW   (BPERDW/sizeof(mat_elmt_t))
 
#define MEMDW_512   512
 
#define BPERMDW_512   (MEMDW_512/8)
 
#define KWPERMDW_512   (BPERMDW_512/sizeof(TYPE))
 
#define TOTMEMDW_512   (1 + (IMGSIZE - 1) / BPERMDW_512)
 
#define CHECK_CHUNK_SIZE   0x1000
 This define configures tha AXI burst size of DDRM memory-mapped interfaces AXI4 allows 4KiB, but Role's AXI interconnect is configured at max 1KiB 0x40->64, 0x400->1024B(1KiB), 0x1000->4KiB. More...
 
#define BYTE_PER_MEM_WORD   BPERMDW_512
 
#define TRANSFERS_PER_CHUNK   (CHECK_CHUNK_SIZE/BYTE_PER_MEM_WORD)
 
#define TRANSFERS_PER_CHUNK_DIVEND   (TOTMEMDW_512-(TOTMEMDW_512/TRANSFERS_PER_CHUNK)*TRANSFERS_PER_CHUNK)
 
#define fsmStateDDRdef   uint8_t
 
#define CYCLES_UNTIL_TIMEOUT   0x0100
 
#define TYPICAL_DDR_LATENCY   4
 
#define DDR_LATENCY   (52/4)
 
#define EXTRA_DDR_LATENCY_DUE_II   (64 + 8)
 

Typedefs

typedef unsigned int img_meta_t
 
typedef uint8_t mat_elmt_t
 
typedef ap_uint< 512 > membus_512_t
 
typedef membus_512_t membus_t
 

Enumerations

enum  EchoCtrl {
  ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 , ECHO_OFF = 2 , ECHO_PATH_THRU = 0 ,
  ECHO_STORE_FWD = 1 , ECHO_OFF = 2 , ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 ,
  ECHO_OFF = 2 , ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 , ECHO_OFF = 2 ,
  ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 , ECHO_OFF = 2 , ECHO_PATH_THRU = 0 ,
  ECHO_STORE_FWD = 1 , ECHO_OFF = 2 , ECHO_PATH_THRU = 0 , ECHO_STORE_FWD = 1 ,
  ECHO_OFF = 2 , ECHO_STORE_FWD = 0 , ECHO_PATH_THRU = 1 , ECHO_CTRL_DISABLED = 0 ,
  ECHO_PATH_THRU = 1 , ECHO_STORE_FWD = 2 , ECHO_OFF = 3
}
 
enum  MemTestCmd {
  TEST_BURSTSIZE_CMD = 4 , TEST_ENDOFTESTS_CMD = 3 , TEST_STOP_CMD = 2 , TEST_START_CMD = 1 ,
  TEST_INVLD_CMD = 0 , WRPTX_IMG_CMD = 2 , WRPTX_TXMAT_CMD = 1 , WRPTX_INVLD_CMD = 0
}
 

Functions

void warp_transform (ap_uint< 32 > *pi_rank, ap_uint< 32 > *pi_size, stream< NetworkWord > &siSHL_This_Data, stream< NetworkWord > &soTHIS_Shl_Data, stream< NetworkMetaStream > &siNrc_meta, stream< NetworkMetaStream > &soNrc_meta, ap_uint< 32 > *po_rx_ports, stream< DmCmd > &soMemWrCmdP0, stream< DmSts > &siMemWrStsP0, stream< Axis< 512 > > &soMemWriteP0, membus_t *lcl_mem0, membus_t *lcl_mem1)
 

Variables

const unsigned int const_tx_matrix_dim = 9
 

Detailed Description

The Role for a WarpTransform Example application (UDP or TCP)

Copyright 2016 – 2022 IBM Corporation

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

Author
DCO

@date Nov 2021

: This application implements a set of UDP-oriented tests and functions which are embedded into the Flash of the cloudFPGA role.

Deprecated:
For the time being, we continue designing with the DEPRECATED directives because the new PRAGMAs do not work for us.

Definition in file warp_transform.hpp.