cloudFPGA (cF) API  1.0
The documentation of the source code of cloudFPGA (cF)
sobel_network_library.hpp
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1 
17 
41 #ifndef _ROLE_SOBEL_LIBRARY_HPP_
42 #define _ROLE_SOBEL_LIBRARY_HPP_
43 
44 #include <stdio.h>
45 #include <iostream>
46 #include <hls_stream.h>
47 #include "ap_int.h"
48 #include <stdint.h>
49 #include "../../../../../HOST/vision/sobel/languages/cplusplus/include/config.h"//debug level define
50 #include "memory_utils.hpp" //for stream based communication with ddr
51 #include "network.hpp"
52 
53 using namespace hls;
54 
55 #define FSM_WRITE_NEW_DATA 0
56 #define FSM_DONE 1
57 #define PortFsmType uint8_t
58 // Starting with 2718, this number corresponds to the extra opened ports of this role. Every bit set
59 // corresponds to one port.
60 // e.g. 0x1->2718, 0x2->2719, 0x3->[2718,2719], 0x7->[2718,2719,2720], 0x17->[2718-2722], etc.
61 #define PORTS_OPENED 0x1F
62 
63 #ifdef ENABLE_DDR
64 #if TRANSFERS_PER_CHUNK_DIVEND == 0
65 #define TRANSFERS_PER_CHUNK_LAST_BURST TRANSFERS_PER_CHUNK
66 #else
67 #define TRANSFERS_PER_CHUNK_LAST_BURST TRANSFERS_PER_CHUNK_DIVEND
68 #endif
69 #endif
70 
71 
75 
76 
87  ap_uint<32> *pi_rank,
88  ap_uint<32> *pi_size,
89  stream<NodeId> &sDstNode_sig,
90  ap_uint<32> *po_rx_ports
91  )
92 {
93  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
94 #pragma HLS INLINE off
95  //-- STATIC VARIABLES (with RESET) ------------------------------------------
96  static PortFsmType port_fsm = FSM_WRITE_NEW_DATA;
97 #pragma HLS reset variable=port_fsm
98 
99  switch(port_fsm)
100  {
101  default:
102  case FSM_WRITE_NEW_DATA:
103  printf("DEBUG in pPortAndDestionation: port_fsm - FSM_WRITE_NEW_DATA\n");
104  //Sobel app needs to be reset to process new rank
105  if(!sDstNode_sig.full())
106  {
107  NodeId dst_rank = (*pi_rank + 1) % *pi_size;
108  #if DEBUG_LEVEL == TRACE_ALL
109  printf("rank: %d; size: %d; \n", (int) *pi_rank, (int) *pi_size);
110  #endif
111  sDstNode_sig.write(dst_rank);
112  *po_rx_ports = 0x0; //init the value
113  port_fsm = FSM_DONE;
114  }
115  break;
116  case FSM_DONE:
117  printf("DEBUG in pPortAndDestionation: port_fsm - FSM_DONE\n");
118  *po_rx_ports = PORTS_OPENED;
119  break;
120  }
121 
122 }
123 
124 
125 
126 
139 void pRXPath(
140  stream<NetworkWord> &siSHL_This_Data,
141  stream<NetworkMetaStream> &siNrc_meta,
142  stream<NetworkMetaStream> &sRxtoTx_Meta,
143  //stream<Data_t_in> &img_in_axi_stream,
144  stream<ap_uint<INPUT_PTR_WIDTH>> &img_in_axi_stream,
145  NetworkMetaStream meta_tmp,
146  unsigned int *processed_word_rx,
147  unsigned int *processed_bytes_rx,
148  stream<bool> &sImageLoaded
149  )
150 {
151  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
152  #pragma HLS INLINE off
153  #pragma HLS pipeline II=1
154 
155  //-- LOCAL VARIABLES ------------------------------------------------------
156  static NetworkWord netWord;
158  #pragma HLS reset variable=enqueueFSM
159 
160  switch(enqueueFSM)
161  {
162  case WAIT_FOR_META:
163  printf("DEBUG in pRXPath: enqueueFSM - WAIT_FOR_META, *processed_word_rx=%u, *processed_bytes_rx=%u\n",
164  *processed_word_rx, *processed_bytes_rx);
165  if ( !siNrc_meta.empty() && !sRxtoTx_Meta.full() )
166  {
167  meta_tmp = siNrc_meta.read();
168  meta_tmp.tlast = 1; //just to be sure...
169  sRxtoTx_Meta.write(meta_tmp);
171  }
172  break;
173 
174  case PROCESSING_PACKET:
175  printf("DEBUG in pRXPath: enqueueFSM - PROCESSING_PACKET, *processed_word_rx=%u, *processed_bytes_rx=%u\n",
176  *processed_word_rx, *processed_bytes_rx);
177  if ( !siSHL_This_Data.empty() && !img_in_axi_stream.full())
178  {
179  //-- Read incoming data chunk
180  netWord = siSHL_This_Data.read();
181  storeWordToAxiStream(netWord, img_in_axi_stream, processed_word_rx, processed_bytes_rx,
182  sImageLoaded);
183  if(netWord.tlast == 1)
184  {
186  }
187  }
188  break;
189  }
190 }
191 
192 
193 
205 template<typename TMemWrd, const unsigned int loop_cnt, const unsigned int cTransfers_Per_Chunk>
207  stream<NetworkWord> &siSHL_This_Data,
208  stream<NetworkMetaStream> &siNrc_meta,
209  stream<NetworkMetaStream> &sRxtoTx_Meta,
210  stream<ap_uint<TMemWrd>> &img_in_axi_stream,
211  stream<bool> &sMemBurstRx
212  )
213 {
214  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
215  #pragma HLS INLINE off
216 
217  //-- LOCAL VARIABLES ------------------------------------------------------
218  static NetworkWord netWord;
219  // const unsigned int loop_cnt = (MEMDW_512/BITS_PER_10GBITETHRNET_AXI_PACKET);
220  NetworkMetaStream meta_tmp;
221  static ap_uint<TMemWrd> v = 0;
222  static unsigned int cnt_wr_stream = 0, cnt_wr_burst = 0;
223  #pragma HLS reset variable=cnt_wr_stream
224  #pragma HLS reset variable=cnt_wr_burst
226  #pragma HLS reset variable=enqueueRxToStrFSM
227 
228  switch(enqueueRxToStrFSM)
229  {
230  case WAIT_FOR_META:
231  printf("DEBUG in pRXPathNetToStream: enqueueRxToStrFSM - WAIT_FOR_META\n");
232 
233  if ( !siNrc_meta.empty() && !sRxtoTx_Meta.full() )
234  {
235  meta_tmp = siNrc_meta.read();
236  meta_tmp.tlast = 1; //just to be sure...
237  sRxtoTx_Meta.write(meta_tmp);
239  }
240  break;
241 
242  case PROCESSING_PACKET:
243  printf("DEBUG in pRXPathNetToStream: enqueueRxToStrFSM - PROCESSING_PACKET\n");
244  if ( !siSHL_This_Data.empty() && !img_in_axi_stream.full())
245  {
246  //-- Read incoming data chunk
247  netWord = siSHL_This_Data.read();
248  printf("DEBUG in pRXPathNetToStream: Data write = {D=0x%16.16llX, K=0x%2.2X, L=%d} \n",
249  netWord.tdata.to_long(), netWord.tkeep.to_int(), netWord.tlast.to_int());
250  if ((netWord.tkeep >> cnt_wr_stream) == 0) {
251  printf("WARNING: value with tkeep=0 at cnt_wr_stream=%u\n", cnt_wr_stream);
252  }
253  v(cnt_wr_stream*64, (cnt_wr_stream+1)*64-1) = netWord.tdata(0,63);
254  if ((cnt_wr_stream++ == loop_cnt-1) || (netWord.tlast == 1)) {
255  std::cout << "DEBUG in pRXPathNetToStream: Pushing to img_in_axi_stream :" << std::hex << v << std::endl;
256  img_in_axi_stream.write(v);
257  if ((cnt_wr_burst++ == cTransfers_Per_Chunk-1) || (netWord.tlast == 1)) {
258  if (!sMemBurstRx.full()) {
259  sMemBurstRx.write(true);
260  }
261  cnt_wr_burst = 0;
262  }
263  if (netWord.tlast == 1) {
265  }
266  cnt_wr_stream = 0;
267  }
268  }
269  break;
270  }
271 }
272 
273 
274 
286 template <typename TMemWrd,const unsigned int loop_cnt,const unsigned int bytes_per_loop>
288  stream<ap_uint<TMemWrd>> &img_in_axi_stream,
289  stream<bool> &sMemBurstRx,
290  //---- P0 Write Path (S2MM) -----------
291  stream<DmCmd> &soMemWrCmdP0,
292  stream<DmSts> &siMemWrStsP0,
293  stream<Axis<TMemWrd> > &soMemWriteP0,
294  //---- P1 Memory mapped ---------------
295  stream<bool> &sImageLoaded
296  )
297 {
298  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
299  #pragma HLS INLINE off
300  #pragma HLS pipeline II=1
301 
302  //-- LOCAL VARIABLES ------------------------------------------------------
303  static ap_uint<TMemWrd> v = 0;
304  // const unsigned int loop_cnt = (MEMDW_512/BITS_PER_10GBITETHRNET_AXI_PACKET);
305  // const unsigned int bytes_per_loop = (BYTES_PER_10GBITETHRNET_AXI_PACKET*loop_cnt);
306  static unsigned int cur_transfers_per_chunk;
307  static unsigned int cnt_wr_stream, cnt_wr_img_loaded;
308  static unsigned int ddr_addr_in;
310  #pragma HLS reset variable=enqueueStrToDdrFSM
311 
312  static ap_uint<32> patternWriteNum;
313  static ap_uint<32> timeoutCnt;
314 
315  static Axis<TMemWrd> memP0;
316  static DmSts memWrStsP0;
317  static unsigned int processed_bytes_rx;
318 
319  #pragma HLS reset variable=cur_transfers_per_chunk
320  #pragma HLS reset variable=cnt_wr_stream
321  #pragma HLS reset variable=cnt_wr_img_loaded
322  #pragma HLS reset variable=ddr_addr_in
323  #pragma HLS reset variable=patternWriteNum
324  #pragma HLS reset variable=timeoutCnt
325  #pragma HLS reset variable=memP0
326  #pragma HLS reset variable=memWrStsP0
327 
328  switch(enqueueStrToDdrFSM)
329  {
330  case WAIT_FOR_META:
331  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - WAIT_FOR_META, processed_bytes_rx=%u\n",
332  processed_bytes_rx);
333 
334  if ( !img_in_axi_stream.empty() )
335  {
336  if ((processed_bytes_rx) == 0) {
337  memP0.tdata = 0;
338  memP0.tlast = 0;
339  memP0.tkeep = 0;
340  patternWriteNum = 0;
341  timeoutCnt = 0;
342  cur_transfers_per_chunk = 0;
343  ddr_addr_in = 0;
344  cnt_wr_stream = 0;
345  v = 0;
346  memWrStsP0.tag = 0;
347  memWrStsP0.interr = 0;
348  memWrStsP0.decerr = 0;
349  memWrStsP0.slverr = 0;
350  memWrStsP0.okay = 0;
351  }
353  }
354  break;
355 
356  case FSM_CHK_PROC_BYTES:
357  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_CHK_PROC_BYTES, processed_bytes_rx=%u\n", processed_bytes_rx);
358  if (processed_bytes_rx < IMGSIZE-bytes_per_loop) {
359  (processed_bytes_rx) += bytes_per_loop;
360  }
361  else {
362  printf("DEBUG in pRXPathStreamToDDR: WARNING - you've reached the max depth of img. Will put processed_bytes_rx = 0.\n");
363  processed_bytes_rx = 0;
364  }
366  break;
367 
368 case FSM_WR_PAT_CMD:
369  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_CMD\n");
370  if ( !soMemWrCmdP0.full() ) {
371  //-- Post a memory write command to SHELL/Mem/Mp0
372  if (processed_bytes_rx == 0){
373  cur_transfers_per_chunk = TRANSFERS_PER_CHUNK_LAST_BURST;
374  }
375  else {
376  cur_transfers_per_chunk = TRANSFERS_PER_CHUNK;
377  }
378  if (patternWriteNum == 0) { // Write cmd only the fitst time of every burst
379  soMemWrCmdP0.write(DmCmd(ddr_addr_in * BPERMDW_512, cur_transfers_per_chunk*BPERMDW_512)); // Byte-addresable
380  }
381  ddr_addr_in++;
383  }
384  break;
385 
386 case FSM_WR_PAT_LOAD:
387  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_LOAD\n");
388  // -- Assemble a 512-bit memory word with input values from stream
389  if (patternWriteNum++ >= cur_transfers_per_chunk - 1) {
390  if (!sMemBurstRx.empty()) {
391  if (sMemBurstRx.read() == true) {
392  patternWriteNum = 0;
394  }
395  }
396  }
397  else {
398  if((processed_bytes_rx) == 0) {
400  }
401  else {
403  }
404  }
405  break;
406 
407 case FSM_WR_PAT_DATA:
408  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_DATA\n");
409  if (!soMemWriteP0.full()) {
410  //-- Write a memory word to DRAM
411  if (!img_in_axi_stream.empty()) {
412  memP0.tdata = img_in_axi_stream.read();
413  ap_uint<8> keepVal = 0xFF;
414  memP0.tkeep = (ap_uint<64>) (keepVal, keepVal, keepVal, keepVal, keepVal, keepVal, keepVal, keepVal);
415  if (patternWriteNum++ == cur_transfers_per_chunk - 1) {
416  printf("DEBUG: (patternWriteNum == cur_transfers_per_chunk -1) \n");
417  memP0.tlast = 1;
418  cnt_wr_img_loaded = 0;
419  timeoutCnt = 0;
420  patternWriteNum = 0;
422  }
423  else {
424  memP0.tlast = 0;
425  }
426  std::cout << "DEBUG in pRXPathStreamToDDR: Pushing to soMemWriteP0 :" << std::hex << memP0.tdata << std::endl;
427  soMemWriteP0.write(memP0);
428  }
429  }
430  break;
431 
432 case FSM_WR_PAT_STS_A:
433  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_STS_A\n");
434  if (!siMemWrStsP0.empty()) {
435  printf(" 1 \n");
436  //-- Get the memory write status for Mem/Mp0
437  siMemWrStsP0.read(memWrStsP0);
439  }
440  else {
441  if (timeoutCnt++ >= CYCLES_UNTIL_TIMEOUT) {
442  memWrStsP0.tag = 0;
443  memWrStsP0.interr = 0;
444  memWrStsP0.decerr = 0;
445  memWrStsP0.slverr = 0;
446  memWrStsP0.okay = 0;
448  }
449  }
450  break;
451 
452 case FSM_WR_PAT_STS_B:
453  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_STS_B\n");
454  if ((memWrStsP0.tag == 0x0) && (memWrStsP0.okay == 1)) {
455  if ((processed_bytes_rx) == 0) {
456  if (!sImageLoaded.full()) {
457  if (cnt_wr_img_loaded++ >= 1) {
458  sImageLoaded.write(false);
460  }
461  else {
462  sImageLoaded.write(true);
463  }
464  }
465  }
466  else {
468  }
469  }
470  else {
471  ; // TODO: handle errors on memWrStsP0
472  }
473  break;
474 
475 case FSM_WR_PAT_STS_C:
476  printf("DEBUG in pRXPathStreamToDDR: enqueueStrToDdrFSM - FSM_WR_PAT_STS_C\n");
477  if((processed_bytes_rx) == 0) {
479  }
480  else {
482  }
483  break;
484 }
485 
486 }
487 
488 
489 
490 //TODO:
491 // void pTXPath(
492 // stream<NodeId> &sDstNode_sig,
493 // stream<NetworkWord> &soTHIS_Shl_Data,
494 // stream<NetworkMetaStream> &soNrc_meta,
495 // stream<NetworkWord> &sRxpToTxp_Data,
496 // stream<NetworkMetaStream> &sRxtoTx_Meta,
497 // unsigned int *processed_word_tx,
498 // ap_uint<32> *pi_rank,
499 // ap_uint<32> *pi_size
500 // )
501 
513 void pTXPath(
514  stream<NetworkWord> &soTHIS_Shl_Data,
515  stream<NetworkMetaStream> &soNrc_meta,
516  stream<NetworkWord> &sProcpToTxp_Data,
517  stream<NetworkMetaStream> &sRxtoTx_Meta,
518  stream<NodeId> &sDstNode_sig,
519  unsigned int *processed_word_tx,
520  ap_uint<32> *pi_rank
521 )
522 {
523  //-- DIRECTIVES FOR THIS PROCESS ------------------------------------------
524  //#pragma HLS DATAFLOW interval=1
525  #pragma HLS INLINE off
526 
527  //-- STATIC DATAFLOW VARIABLES ------------------------------------------
528  static NodeId dst_rank;
530  #pragma HLS reset variable=dequeueFSM
531  #pragma HLS reset variable=dst_rank
532 
533  //-- LOCAL VARIABLES ------------------------------------------------------
534  NetworkWord netWordTx;
535  NetworkMeta meta_in = NetworkMeta();
536  #pragma HLS reset variable=netWordTx
537 
538  switch(dequeueFSM)
539  {
540  default:
541  case WAIT_FOR_META:
542  if(!sDstNode_sig.empty())
543  {
544  dst_rank = sDstNode_sig.read();
546  //Sobel app needs to be reset to process new rank
547  }
548  break;
550  #if DEBUG_LEVEL == TRACE_ALL
551  printf("DEBUG in pTXPath: dequeueFSM=%d - WAIT_FOR_STREAM_PAIR, *processed_word_tx=%u\n",
552  dequeueFSM, *processed_word_tx);
553  #endif
554  //-- Forward incoming chunk to SHELL
555  // *processed_word_tx = 0;
556  //Sobel-related
557  if (*processed_word_tx == MIN_TX_LOOPS) {
558  *processed_word_tx = 0;
559  }
560 
561  if (( !sProcpToTxp_Data.empty() && !sRxtoTx_Meta.empty()
562  && !soTHIS_Shl_Data.full() && !soNrc_meta.full() ))
563  {
564  netWordTx = sProcpToTxp_Data.read();
565 
566  // in case MTU=8 ensure tlast is set in WAIT_FOR_STREAM_PAIR and don't visit PROCESSING_PACKET
567  if (PACK_SIZE == 8)
568  {
569  netWordTx.tlast = 1;
570  }
571  soTHIS_Shl_Data.write(netWordTx);
572 
573  meta_in = sRxtoTx_Meta.read().tdata;
574  NetworkMetaStream meta_out_stream = NetworkMetaStream();
575  meta_out_stream.tlast = 1;
576  meta_out_stream.tkeep = 0xFF; //just to be sure
577 
578  //Sobel-related Forcing the SHELL to wait for tlast
579  meta_out_stream.tdata.len = 0;
580 
581  meta_out_stream.tdata.dst_rank = dst_rank;
582  meta_out_stream.tdata.src_rank = (NodeId) *pi_rank;
583  meta_out_stream.tdata.dst_port = meta_in.src_port;
584  meta_out_stream.tdata.src_port = meta_in.dst_port;
585 
586  soNrc_meta.write(meta_out_stream);
587 
588  (*processed_word_tx)++;
589  printf("DEBUG: Checking netWordTx.tlast...\n");
590  if(netWordTx.tlast != 1)
591  {
593  }
594  }
595  break;
596 
597  case PROCESSING_PACKET:
598  #if DEBUG_LEVEL == TRACE_ALL
599  printf("DEBUG in pTXPath: dequeueFSM=%d - PROCESSING_PACKET, *processed_word_tx=%u\n",
600  dequeueFSM, *processed_word_tx);
601  #endif
602  if( !sProcpToTxp_Data.empty() && !soTHIS_Shl_Data.full())
603  {
604  netWordTx = sProcpToTxp_Data.read();
605  // This is a normal termination of the axi stream from vitis functions
606  if(netWordTx.tlast == 1)
607  {
609  }
610 
611  // This is our own termination based on the custom MTU we have set in PACK_SIZE.
612  // TODO: We can map PACK_SIZE to a dynamically assigned value either through MMIO or header
613  // in order to have a functional bitstream for any MTU size
614  (*processed_word_tx)++;
615  if (((*processed_word_tx)*8) % PACK_SIZE == 0)
616  {
617  netWordTx.tlast = 1;
618  printf("DEBUG: A netWordTx.tlast=1 ... sRxpToTxp_Data.empty()==%u \n", sRxpToTxp_Data.empty());
620  }
621 
622  soTHIS_Shl_Data.write(netWordTx);
623  }
624  break;
625  }
626 }
627 
631 
632 #endif //_ROLE_SOBEL_LIBRARY_HPP_
ap_uint< 32 > timeoutCnt
ap_uint< 32 > patternWriteNum
ap_uint< 1 > okay
ap_uint< 1 > decerr
ap_uint< 1 > slverr
ap_uint< 4 > tag
ap_uint< 1 > interr
void storeWordToAxiStream(NetworkWord word, stream< ap_axiu< 64, 0, 0, 0 > > &img_in_axi_stream, unsigned int *processed_word_rx, unsigned int *image_loaded)
Store a word from ethernet to a local AXI stream.
#define IMGSIZE
#define FSM_WR_PAT_STS_B
Definition: harris.hpp:87
#define FSM_WR_PAT_LOAD
Definition: harris.hpp:84
#define FSM_WR_PAT_CMD
Definition: harris.hpp:83
#define TRANSFERS_PER_CHUNK
Definition: harris.hpp:133
#define BPERMDW_512
Definition: harris.hpp:120
#define FSM_WR_PAT_DATA
Definition: harris.hpp:85
#define FSM_CHK_PROC_BYTES
Definition: harris.hpp:81
#define FSM_WR_PAT_STS_A
Definition: harris.hpp:86
#define FSM_WR_PAT_STS_C
Definition: harris.hpp:88
#define MIN_TX_LOOPS
#define TRANSFERS_PER_CHUNK_LAST_BURST
Definition: median_blur.cpp:57
uint8_t enqueueStrToDdrFSM
Definition: median_blur.cpp:50
uint8_t enqueueRxToStrFSM
Definition: median_blur.cpp:49
#define CYCLES_UNTIL_TIMEOUT
Definition: memtest.hpp:96
#define PacketFsmType
Definition: memtest.hpp:76
#define PROCESSING_PACKET
Definition: memtest.hpp:73
#define WAIT_FOR_STREAM_PAIR
Definition: memtest.hpp:72
#define WAIT_FOR_META
Definition: memtest.hpp:71
#define PACK_SIZE
Definition: config.h:51
void pPortAndDestionation(ap_uint< 32 > *pi_rank, ap_uint< 32 > *pi_size, stream< NodeId > &sDstNode_sig, ap_uint< 32 > *po_rx_ports)
pPortAndDestionation - Setup the port and the destination rank.
#define FSM_WRITE_NEW_DATA
void pRXPathStreamToDDR(stream< ap_uint< TMemWrd >> &img_in_axi_stream, stream< bool > &sMemBurstRx, stream< DmCmd > &soMemWrCmdP0, stream< DmSts > &siMemWrStsP0, stream< Axis< TMemWrd > > &soMemWriteP0, stream< bool > &sImageLoaded)
Receive Path - From RX path stream word aligned to store towards the DDR.
#define FSM_DONE
#define PortFsmType
void pTXPath(stream< NetworkWord > &soTHIS_Shl_Data, stream< NetworkMetaStream > &soNrc_meta, stream< NetworkWord > &sProcpToTxp_Data, stream< NetworkMetaStream > &sRxtoTx_Meta, stream< NodeId > &sDstNode_sig, unsigned int *processed_word_tx, ap_uint< 32 > *pi_rank)
Transmit Path - From THIS to SHELL.
void pRXPathNetToStream(stream< NetworkWord > &siSHL_This_Data, stream< NetworkMetaStream > &siNrc_meta, stream< NetworkMetaStream > &sRxtoTx_Meta, stream< ap_uint< TMemWrd >> &img_in_axi_stream, stream< bool > &sMemBurstRx)
Receive Path - From SHELL to THIS. Function for accumulating a memory word and write it Not ready for...
#define PORTS_OPENED
void pRXPath(stream< NetworkWord > &siSHL_This_Data, stream< NetworkMetaStream > &siNrc_meta, stream< NetworkMetaStream > &sRxtoTx_Meta, stream< ap_uint< INPUT_PTR_WIDTH >> &img_in_axi_stream, NetworkMetaStream meta_tmp, unsigned int *processed_word_rx, unsigned int *processed_bytes_rx, stream< bool > &sImageLoaded)
Receive Path - From SHELL to THIS. FIXME: never checked, just substitute this one from DID.
uint8_t enqueueFSM
Definition: uppercase.cpp:54
uint8_t dequeueFSM
Definition: uppercase.cpp:55
ap_uint< 8 > NodeId
Definition: network.hpp:82
ap_uint<(D+7)/8 > tkeep
Definition: axi_utils.hpp:49
ap_uint< 1 > tlast
Definition: axi_utils.hpp:50
ap_uint< D > tdata
Definition: axi_utils.hpp:48
ap_uint< 1 > tlast
Definition: network.hpp:111
ap_uint< 8 > tkeep
Definition: network.hpp:110
NetworkMeta tdata
Definition: network.hpp:109
NetworkDataLength len
Definition: network.hpp:99
NodeId dst_rank
Definition: network.hpp:95
NodeId src_rank
Definition: network.hpp:97
NrcPort src_port
Definition: network.hpp:98
NrcPort dst_port
Definition: network.hpp:96
ap_uint< 64 > tdata
Definition: network.hpp:49
ap_uint< 8 > tkeep
Definition: network.hpp:50
ap_uint< 1 > tlast
Definition: network.hpp:51